From mboxrd@z Thu Jan 1 00:00:00 1970 From: ddutile@redhat.com (Don Dutile) Date: Wed, 9 Nov 2016 13:59:07 -0500 Subject: Summary of LPC guest MSI discussion in Santa Fe In-Reply-To: <20161109170326.GG17771@arm.com> References: <1478209178-3009-1-git-send-email-eric.auger@redhat.com> <20161103220205.37715b49@t450s.home> <20161108024559.GA20591@arm.com> <20161108202922.GC15676@cbox> <20161108163508.1bcae0c2@t450s.home> <58228F71.6020108@redhat.com> <20161109170326.GG17771@arm.com> Message-ID: <582371FB.2040808@redhat.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 11/09/2016 12:03 PM, Will Deacon wrote: > On Tue, Nov 08, 2016 at 09:52:33PM -0500, Don Dutile wrote: >> On 11/08/2016 06:35 PM, Alex Williamson wrote: >>> On Tue, 8 Nov 2016 21:29:22 +0100 >>> Christoffer Dall wrote: >>>> Is my understanding correct, that you need to tell userspace about the >>>> location of the doorbell (in the IOVA space) in case (2), because even >>>> though the configuration of the device is handled by the (host) kernel >>>> through trapping of the BARs, we have to avoid the VFIO user programming >>>> the device to create other DMA transactions to this particular address, >>>> since that will obviously conflict and either not produce the desired >>>> DMA transactions or result in unintended weird interrupts? > > Yes, that's the crux of the issue. > >>> Correct, if the MSI doorbell IOVA range overlaps RAM in the VM, then >>> it's potentially a DMA target and we'll get bogus data on DMA read from >>> the device, and lose data and potentially trigger spurious interrupts on >>> DMA write from the device. Thanks, >>> >> That's b/c the MSI doorbells are not positioned *above* the SMMU, i.e., >> they address match before the SMMU checks are done. if >> all DMA addrs had to go through SMMU first, then the DMA access could >> be ignored/rejected. > > That's actually not true :( The SMMU can't generally distinguish between MSI > writes and DMA writes, so it would just see a write transaction to the > doorbell address, regardless of how it was generated by the endpoint. > > Will > So, we have real systems where MSI doorbells are placed at the same IOVA that could have memory for a guest, but not at the same IOVA as memory on real hw ? How are memory holes passed to SMMU so it doesn't have this issue for bare-metal (assign an IOVA that overlaps an MSI doorbell address)?