From: Chanwoo Choi <cw00.choi@samsung.com>
To: Marek Szyprowski <m.szyprowski@samsung.com>,
linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Subject: Re: [PATCH 4/5] ARM: dts: exynos: Add support ARM architected timers
Date: Tue, 19 Feb 2019 09:03:18 +0900 [thread overview]
Message-ID: <584ac777-445c-81de-d1c1-645306ed88d9@samsung.com> (raw)
In-Reply-To: <4c0a5561-b1f0-6938-3e89-eae5014aafa1@samsung.com>
Hi Marek,
On 19. 2. 18. 오후 9:24, Marek Szyprowski wrote:
> Hi Chanwoo,
>
> On 2019-02-18 12:58, Chanwoo Choi wrote:
>> On 19. 2. 15. 오후 9:52, Marek Szyprowski wrote:
>>> All CortexA7/A15 based Exynos SoCs have ARM architected timers, so enable
>>> support for them directly in the base dtsi for Exynos3250, Exynos5250
>>> and Exynos54xx SoCs. None of the known firmware properly configures arch
>>> timer registers, so mark them as not-fw-configured and set frequency
>>> to 24MHz, which is the only configuration supported by the remaining
>>> drivers (clocks) so far.
>>>
>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>> ---
>>> arch/arm/boot/dts/exynos3250.dtsi | 10 ++++++++++
>>> arch/arm/boot/dts/exynos5250.dtsi | 1 +
>>> arch/arm/boot/dts/exynos54xx.dtsi | 10 ++++++++++
>>> 3 files changed, 21 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
>>> index 608d17454179..3966e7960964 100644
>>> --- a/arch/arm/boot/dts/exynos3250.dtsi
>>> +++ b/arch/arm/boot/dts/exynos3250.dtsi
>>> @@ -134,6 +134,16 @@
>>> };
>>> };
>>>
>>> + timer {
>>> + compatible = "arm,armv7-timer";
>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> + clock-frequency = <24000000>;
>>> + arm,cpu-registers-not-fw-configured;
>>> + };
>>> +
>>> sysram@2020000 {
>>> compatible = "mmio-sram";
>>> reg = <0x02020000 0x40000>;
>>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
>>> index 80986b97dfe5..95af4050f69d 100644
>>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>>> @@ -239,6 +239,7 @@
>>> * so we need the value from DT.
>>> */
>>> clock-frequency = <24000000>;
>>> + arm,cpu-registers-not-fw-configured;
>>> };
>>>
>>> mct@101c0000 {
>>> diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
>>> index de26e5ee0d2d..45e06717ee51 100644
>>> --- a/arch/arm/boot/dts/exynos54xx.dtsi
>>> +++ b/arch/arm/boot/dts/exynos54xx.dtsi
>>> @@ -46,6 +46,16 @@
>>> status = "disabled";
>>> };
>>>
>>> + timer {
>>> + compatible = "arm,armv7-timer";
>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> + arm,cpu-registers-not-fw-configured;
>>> + clock-frequency = <24000000>;
>>> + };
>>> +
>>> sysram@2020000 {
>>> compatible = "mmio-sram";
>>> reg = <0x02020000 0x54000>;
>>>
>> The exynos54xx.dtsi affects the exynos5410 SoC.
>> When I checked the PPI port number on Exynos5410/Exynos5422 TRM,
>> they have the different PPI port number as following:
>>
>> |Exynos5410 |Exynos5422 |
>> ----------------------------------------------------------------------------------------
>> ARCH_TIMER_PHYS_SECURE_PPI |1 nCNTPSIRQ |13 nCNTPSIRQ |Secure physical timer
>> ARCH_TIMER_PHYS_NONSECURE_PPI |2 nCNTPNSIRQ |14 nCNTPNSIRQ |Non-secure physical timer
>> ARCH_TIMER_VIRT_PPI |4 nCNTVIRQ |11 nCNTVIRQ |Virtual timer
>> ARCH_TIMER_HYP_PPI |5 nCNTHPIRQ |10 nCNTHPIRQ |Hypervisor timer
>> ----------------------------------------------------------------------------------------
>
> Sadly, Exynos5410 TRM seems to be wrong. All other Exynos5 TRMs (5250,
> 5260, 5420, 5422) defines 13,14,11,10 PPI for arch timer. I've checked
> on the real hardware (Exynos5410-based Odroid XU board) and the values
> taken from Exynos5422 TRM works fine, while the ones from 5410 TRM don't.
Thanks for sharing the tested result.
Reveiwed-by: Chanwoo Choi <cw00.choi@samsung.com>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
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next prev parent reply other threads:[~2019-02-19 0:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190215125238eucas1p2f56fe48600aedcec048bc378ed184419@eucas1p2.samsung.com>
2019-02-15 12:52 ` [PATCH 0/5] Exynos SoCs: enable support for ARM Architected Timers Marek Szyprowski
2019-02-15 12:52 ` [PATCH 1/5] clocksource: exynos_mct: Remove dead code Marek Szyprowski
2019-02-15 12:52 ` [PATCH v4 2/6] clocksource: exynos_mct: Fix error path in timer resources initialization Marek Szyprowski
2019-02-15 12:52 ` [PATCH 3/5] clocksource: exynos_mct: Increase priority over ARM arch timer Marek Szyprowski
2019-02-15 12:59 ` Krzysztof Kozlowski
2019-02-15 16:35 ` Daniel Lezcano
2019-02-18 7:41 ` Marek Szyprowski
2019-02-18 9:24 ` Daniel Lezcano
2019-02-18 9:49 ` Marek Szyprowski
2019-02-18 10:21 ` Daniel Lezcano
2019-02-18 8:53 ` Krzysztof Kozlowski
2019-02-18 8:55 ` Daniel Lezcano
2019-02-15 12:52 ` [PATCH 4/5] ARM: dts: exynos: Add support ARM architected timers Marek Szyprowski
2019-02-18 11:58 ` Chanwoo Choi
2019-02-18 12:24 ` Marek Szyprowski
2019-02-19 0:03 ` Chanwoo Choi [this message]
2019-02-15 12:52 ` [PATCH 5/5] ARM: exynos: Enable support for " Marek Szyprowski
2019-02-19 0:06 ` Chanwoo Choi
2019-02-15 16:36 ` [PATCH 0/5] Exynos SoCs: enable support for ARM Architected Timers Daniel Lezcano
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