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Wed, 12 Nov 2025 08:16:22 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 222.71.101.198) smtp.mailfrom=cixtech.com; dkim=none (message not signed) header.d=none;dmarc=bestguesspass action=none header.from=cixtech.com; Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by SG1PEPF000082E5.mail.protection.outlook.com (10.167.240.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9320.13 via Frontend Transport; Wed, 12 Nov 2025 08:16:22 +0000 Received: from [172.16.96.116] (unknown [172.16.96.116]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 9515941C0160; Wed, 12 Nov 2025 16:16:20 +0800 (CST) Message-ID: <58b37b3a-7bb7-46bb-8ad4-f4d2f152bf1f@cixtech.com> Date: Wed, 12 Nov 2025 16:16:20 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 0/2] PCI: Configure Root Port MPS during host probing To: Mahesh Vaidya , Hans Zhang <18255117159@163.com>, lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, helgaas@kernel.org, heiko@sntech.de, mani@kernel.org, yue.wang@Amlogic.com Cc: pali@kernel.org, neil.armstrong@linaro.org, robh@kernel.org, jingoohan1@gmail.com, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, cassel@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-rockchip@lists.infradead.org References: <20251104165125.174168-1-18255117159@163.com> Content-Language: en-US From: Hans Zhang In-Reply-To: Content-Type: text/plain; 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X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 08:16:22.1239 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 06fa7845-5242-434b-f508-08de21c3c3f3 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG1PEPF000082E5.apcprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR06MB6871 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251112_001630_679108_F27CA4CB X-CRM114-Status: GOOD ( 17.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/12/2025 4:06 PM, Mahesh Vaidya wrote: > [You don't often get email from mahesh.vaidya@altera.com. Learn why this > is important at https://aka.ms/LearnAboutSenderIdentification ] > > EXTERNAL EMAIL > > On 04-11-2025 22:21, Hans Zhang wrote: >> Current PCIe initialization exhibits a key optimization gap: Root Ports >> may operate with non-optimal Maximum Payload Size (MPS) settings. While >> downstream device configuration is handled during bus enumeration, Root >> Port MPS values inherited from firmware or hardware defaults often fail >> to utilize the full capabilities supported by controller hardware. This >> results in suboptimal data transfer efficiency throughout the PCIe >> hierarchy. >> >> This patch series addresses this by: >> >> 1.  Core PCI enhancement (Patch 1): >> - Proactively configures Root Port MPS during host controller probing >> - Sets initial MPS to hardware maximum (128 << dev->pcie_mpss) >> - Conditional on PCIe bus tuning being enabled (PCIE_BUS_TUNE_OFF unset) >> - Maintains backward compatibility via PCIE_BUS_TUNE_OFF check >> - Preserves standard MPS negotiation during downstream enumeration >> >> 2.  Driver cleanup (Patch 2): >> - Removes redundant MPS configuration from Meson PCIe controller driver >> - Functionality is now centralized in PCI core >> - Simplifies driver maintenance long-term >> >> --- >> Changes for v6: >> - Modify the commit message and comments. (Bjorn) >> - Patch 1/2 code logic: Add !bridge check to configure MPS only for >> Root Ports >>    without an upstream bridge (root bridges), avoiding incorrect >> handling of >>    non-root-bridge Root Ports (Niklas). > Tested this patch series on Agilex 7. > > Tested-by: Mahesh Vaidya > Hi Mahesh, Thank you for your test. Best regards, Hans >> >> Changes for v5: >> https://patchwork.kernel.org/project/linux-pci/ >> patch/20250620155507.1022099-1-18255117159@163.com/ >> >> - Use pcie_set_mps directly instead of pcie_write_mps. >> - The patch 1 commit message were modified. >> >> Changes for v4: >> https://patchwork.kernel.org/project/linux-pci/ >> patch/20250510155607.390687-1-18255117159@163.com/ >> >> - The patch [v4 1/2] add a comment to explain why it was done this way. >> - The patch [v4 2/2] have not been modified. >> - Drop patch [v3 3/3]. The Maintainer of the pci-aardvark.c file suggests >>    that this patch cannot be submitted. In addition, Mani also suggests >>    dropping this patch until this series of issues is resolved. >> >> Changes for v3: >> https://patchwork.kernel.org/project/linux-pci/ >> patch/20250506173439.292460-1-18255117159@163.com/ >> >> - The new split is patch 2/3 and 3/3. >> - Modify the patch 1/3 according to Niklas' suggestion. >> >> Changes for v2: >> https://patchwork.kernel.org/project/linux-pci/ >> patch/20250425095708.32662-1-18255117159@163.com/ >> >> - According to the Maintainer's suggestion, limit the setting of MPS >>    changes to platforms with controller drivers. >> - Delete the MPS code set by the SOC manufacturer. >> --- >> >> Hans Zhang (2): >>    PCI: Configure Root Port MPS during host probing >>    PCI: dwc: Remove redundant MPS configuration >> >>   drivers/pci/controller/dwc/pci-meson.c | 17 ----------------- >>   drivers/pci/probe.c                    | 12 ++++++++++++ >>   2 files changed, 12 insertions(+), 17 deletions(-) >> >> >> base-commit: 691d401c7e0e5ea34ac6f8151bc0696db1b2500a >