[PATCH 0/3] SCMI clocks on RK356x

[PATCH 0/3] SCMI clocks on RK356x

[Heiko Stuebner]

This cleans up the existing use of SCMI clocks on the RK356x SoCs.


Heiko Stuebner (3):
  dt-bindings: clock: rk3568: Add SCMI clock ids
  arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x
  arm64: dts: rockchip: add missing clocks for cpu cores on rk356

 arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 5 ++++-
 include/dt-bindings/clock/rk3568-cru.h        | 6 ++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

-- 
2.47.2

[PATCH 1/3] dt-bindings: clock: rk3568: Add SCMI clock ids

[Heiko Stuebner]

The Trusted Firmware on RK3568 exposes 3 clocks via the SCMI clock
interface. Add descriptive IDs for them.

The clock ids are used in both the older vendor-binary TF-A, as well
as the recently merged upstream SCMI clock implementation.

Link: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/31265
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 include/dt-bindings/clock/rk3568-cru.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index f01f0e9ce8f1..1e0aef8a645d 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -483,6 +483,12 @@
 
 #define PCLK_CORE_PVTM		450
 
+/* scmi-clocks indices */
+
+#define SCMI_CLK_CPU		0
+#define SCMI_CLK_GPU		1
+#define SCMI_CLK_NPU		2
+
 /* pmu soft-reset indices */
 /* pmucru_softrst_con0 */
 #define SRST_P_PDPMU_NIU	0
-- 
2.47.2

[PATCH 2/3] arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x

[Heiko Stuebner]

Instead of hard-coding 0, use the more descriptive ID from the binding
to reference the SCMI clock for the cpu on rk356x.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index a3361527d4fe..d0c76401b45e 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -53,7 +53,7 @@ cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x0>;
-			clocks = <&scmi_clk 0>;
+			clocks = <&scmi_clk SCMI_CLK_CPU>;
 			#cooling-cells = <2>;
 			enable-method = "psci";
 			i-cache-size = <0x8000>;
-- 
2.47.2

[PATCH 3/3] arm64: dts: rockchip: add missing clocks for cpu cores on rk356x

[Heiko Stuebner]

All cpu cores are supplied by the same clock, but all except the first
core are missing that clocks reference - add the missing ones.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index d0c76401b45e..a1815f8a96e1 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -69,6 +69,7 @@ cpu1: cpu@100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x100>;
+			clocks = <&scmi_clk SCMI_CLK_CPU>;
 			#cooling-cells = <2>;
 			enable-method = "psci";
 			i-cache-size = <0x8000>;
@@ -84,6 +85,7 @@ cpu2: cpu@200 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x200>;
+			clocks = <&scmi_clk SCMI_CLK_CPU>;
 			#cooling-cells = <2>;
 			enable-method = "psci";
 			i-cache-size = <0x8000>;
@@ -99,6 +101,7 @@ cpu3: cpu@300 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x300>;
+			clocks = <&scmi_clk SCMI_CLK_CPU>;
 			#cooling-cells = <2>;
 			enable-method = "psci";
 			i-cache-size = <0x8000>;
-- 
2.47.2

Re: [PATCH 1/3] dt-bindings: clock: rk3568: Add SCMI clock ids

[Conor Dooley]

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Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
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Re: [PATCH 1/3] dt-bindings: clock: rk3568: Add SCMI clock ids

[Diederik de Haas]

On Tue Nov 4, 2025 at 12:49 AM CET, Heiko Stuebner wrote:
> The Trusted Firmware on RK3568 exposes 3 clocks via the SCMI clock
> interface. Add descriptive IDs for them.
>
> The clock ids are used in both the older vendor-binary TF-A, as well
> as the recently merged upstream SCMI clock implementation.
>
> Link: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/31265
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  include/dt-bindings/clock/rk3568-cru.h | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
> index f01f0e9ce8f1..1e0aef8a645d 100644
> --- a/include/dt-bindings/clock/rk3568-cru.h
> +++ b/include/dt-bindings/clock/rk3568-cru.h
> @@ -483,6 +483,12 @@
>  
>  #define PCLK_CORE_PVTM		450
>  
> +/* scmi-clocks indices */
> +
> +#define SCMI_CLK_CPU		0
> +#define SCMI_CLK_GPU		1
> +#define SCMI_CLK_NPU		2
> +

This corresponds with the id's in ``clock_table`` in TF-A's
``plat/rockchip/rk3568/drivers/scmi/rk3568_clk.c`` file, so

Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>

>  /* pmu soft-reset indices */
>  /* pmucru_softrst_con0 */
>  #define SRST_P_PDPMU_NIU	0

Re: [PATCH 2/3] arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x

[Diederik de Haas]

Hi Heiko,

On Tue Nov 4, 2025 at 12:49 AM CET, Heiko Stuebner wrote:
> Instead of hard-coding 0, use the more descriptive ID from the binding
> to reference the SCMI clock for the cpu on rk356x.

Any particular reason you only did it for the cpu, but not the gpu?

> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> index a3361527d4fe..d0c76401b45e 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> @@ -53,7 +53,7 @@ cpu0: cpu@0 {
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a55";
>  			reg = <0x0 0x0>;
> -			clocks = <&scmi_clk 0>;
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;

Regardless of the above comment, feel free to add

Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>

Cheers,
  Diederik

>  			#cooling-cells = <2>;
>  			enable-method = "psci";
>  			i-cache-size = <0x8000>;

Re: [PATCH 3/3] arm64: dts: rockchip: add missing clocks for cpu cores on rk356x

[Diederik de Haas]

On Tue Nov 4, 2025 at 12:49 AM CET, Heiko Stuebner wrote:
> All cpu cores are supplied by the same clock, but all except the first
> core are missing that clocks reference - add the missing ones.

I noticed it myself some time ago (but failed to sent a patch), so

Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>

Cheers,
  Diederik

> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> index d0c76401b45e..a1815f8a96e1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> @@ -69,6 +69,7 @@ cpu1: cpu@100 {
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a55";
>  			reg = <0x0 0x100>;
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
>  			#cooling-cells = <2>;
>  			enable-method = "psci";
>  			i-cache-size = <0x8000>;
> @@ -84,6 +85,7 @@ cpu2: cpu@200 {
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a55";
>  			reg = <0x0 0x200>;
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
>  			#cooling-cells = <2>;
>  			enable-method = "psci";
>  			i-cache-size = <0x8000>;
> @@ -99,6 +101,7 @@ cpu3: cpu@300 {
>  			device_type = "cpu";
>  			compatible = "arm,cortex-a55";
>  			reg = <0x0 0x300>;
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
>  			#cooling-cells = <2>;
>  			enable-method = "psci";
>  			i-cache-size = <0x8000>;

Re: [PATCH 0/3] SCMI clocks on RK356x

[Heiko Stuebner]

On Tue, 04 Nov 2025 00:49:23 +0100, Heiko Stuebner wrote:
> This cleans up the existing use of SCMI clocks on the RK356x SoCs.
> 
> 
> Heiko Stuebner (3):
>   dt-bindings: clock: rk3568: Add SCMI clock ids
>   arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x
>   arm64: dts: rockchip: add missing clocks for cpu cores on rk356
> 
> [...]

Applied, thanks!

[1/3] dt-bindings: clock: rk3568: Add SCMI clock ids
      commit: 88b6a93af4345e901206d0576bdb4e88ea3eaeb8
[2/3] arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x
      commit: ff8912700f31782021ec28c530de1482fa99eab3
[3/3] arm64: dts: rockchip: add missing clocks for cpu cores on rk356x
      commit: e06a419eaab9cee7cd5bbb0cfcfbe49e443a9d75

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Re: [PATCH 2/3] arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x

[Heiko Stuebner]

Am Mittwoch, 5. November 2025, 14:16:42 Mitteleuropäische Normalzeit schrieb Diederik de Haas:
> Hi Heiko,
> 
> On Tue Nov 4, 2025 at 12:49 AM CET, Heiko Stuebner wrote:
> > Instead of hard-coding 0, use the more descriptive ID from the binding
> > to reference the SCMI clock for the cpu on rk356x.
> 
> Any particular reason you only did it for the cpu, but not the gpu?

Didn't think of if at the time :-) .

Will prepare another one for the GPU.


Heiko

> 
> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> > index a3361527d4fe..d0c76401b45e 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> > @@ -53,7 +53,7 @@ cpu0: cpu@0 {
> >  			device_type = "cpu";
> >  			compatible = "arm,cortex-a55";
> >  			reg = <0x0 0x0>;
> > -			clocks = <&scmi_clk 0>;
> > +			clocks = <&scmi_clk SCMI_CLK_CPU>;
> 
> Regardless of the above comment, feel free to add
> 
> Reviewed-by: Diederik de Haas <diederik@cknow-tech.com>
> 
> Cheers,
>   Diederik
> 
> >  			#cooling-cells = <2>;
> >  			enable-method = "psci";
> >  			i-cache-size = <0x8000>;
> 
>