From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADE13C433FF for ; Wed, 31 Jul 2019 13:09:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 848D920693 for ; Wed, 31 Jul 2019 13:09:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="TtmUS9oe" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 848D920693 Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hsoLx-0004nU-UO; Wed, 31 Jul 2019 13:09:13 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hsoLv-0004mb-6s for linux-arm-kernel@lists.infradead.org; Wed, 31 Jul 2019 13:09:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CC7FB1570; Wed, 31 Jul 2019 06:09:08 -0700 (PDT) Received: from [10.1.197.45] (e112298-lin.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 750113F575; Wed, 31 Jul 2019 06:09:07 -0700 (PDT) Subject: Re: [PATCH v4.4 V2 25/43] arm64: Move BP hardening to check_and_switch_context To: Viresh Kumar , stable@vger.kernel.org References: From: Julien Thierry Message-ID: <59b252cf-9cb7-128b-4887-c21a8b9b92a9@arm.com> Date: Wed, 31 Jul 2019 14:09:05 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190731_060911_296386_014C1916 X-CRM114-Status: GOOD ( 20.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Marc Zyngier , Catalin Marinas , Will Deacon , mark.brown@arm.com, julien.thierry.kdev@gmail.com, Russell King , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/07/2019 06:28, Viresh Kumar wrote: > From: Marc Zyngier > > commit a8e4c0a919ae310944ed2c9ace11cf3ccd8a609b upstream. > > We call arm64_apply_bp_hardening() from post_ttbr_update_workaround, > which has the unexpected consequence of being triggered on every > exception return to userspace when ARM64_SW_TTBR0_PAN is selected, > even if no context switch actually occured. > > This is a bit suboptimal, and it would be more logical to only > invalidate the branch predictor when we actually switch to > a different mm. > > In order to solve this, move the call to arm64_apply_bp_hardening() > into check_and_switch_context(), where we're guaranteed to pick > a different mm context. > > Acked-by: Will Deacon > Signed-off-by: Marc Zyngier > Signed-off-by: Catalin Marinas > Signed-off-by: Viresh Kumar > --- > arch/arm64/mm/context.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c > index be42bd3dca5c..de5afc27b4e6 100644 > --- a/arch/arm64/mm/context.c > +++ b/arch/arm64/mm/context.c > @@ -183,6 +183,8 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu) > raw_spin_unlock_irqrestore(&cpu_asid_lock, flags); > > switch_mm_fastpath: > + arm64_apply_bp_hardening(); > + > cpu_switch_mm(mm->pgd, mm); > } > > @@ -193,8 +195,6 @@ asmlinkage void post_ttbr_update_workaround(void) > "ic iallu; dsb nsh; isb", > ARM64_WORKAROUND_CAVIUM_27456, > CONFIG_CAVIUM_ERRATUM_27456)); > - > - arm64_apply_bp_hardening(); Patches 22 and 23 factorize the post_ttbr_update_workaround() and move it to C code just so we would and a call to arm64_apply_bp_hardening() in patch 24 that now gets moved elsewhere? Is it really worth backporting patches 22 and 23? Cheers, -- Julien Thierry _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel