From mboxrd@z Thu Jan 1 00:00:00 1970 From: zhengqiang10@huawei.com (Zhengqiang) Date: Mon, 21 May 2018 17:39:01 +0800 Subject: [PATCH] EDAC, ghes: Make platform-based whitelisting x86-only In-Reply-To: <20180518112028.GD17285@pd.tnic> References: <1526039543-180996-1-git-send-email-zhengqiang10@huawei.com> <20180511121901.GA12705@pd.tnic> <5AF90C70.408@huawei.com> <20180514094709.GC23049@pd.tnic> <20180514164720.GH23049@pd.tnic> <20180516182958.GB17092@pd.tnic> <8602b133-e0fa-57e2-5159-9d34a1ded85f@arm.com> <20180518111132.GC17285@pd.tnic> <20180518112028.GD17285@pd.tnic> Message-ID: <5B0293B5.5060406@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Thanks, it works for me. On 2018/5/18 19:20, Borislav Petkov wrote: > From: Borislav Petkov > > ARM machines all have DMI tables so if they request hw error reporting > through GHES, then the driver should be able to detect DIMMs and report > errors successfully (famous last words :)). > > Make the platform-based list x86-specific so that ghes_edac can load on > ARM. > > Signed-off-by: Borislav Petkov > Reviewed-by: James Morse > Tested-by: James Morse > Cc: Qiang Zheng > Link: https://lkml.kernel.org/r/1526039543-180996-1-git-send-email-zhengqiang10 at huawei.com Tested-by: Qiang Zheng > --- > drivers/edac/ghes_edac.c | 14 +++++++++----- > 1 file changed, 9 insertions(+), 5 deletions(-) > > diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c > index 863fbf3db29f..473aeec4b1da 100644 > --- a/drivers/edac/ghes_edac.c > +++ b/drivers/edac/ghes_edac.c > @@ -440,12 +440,16 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev) > struct mem_ctl_info *mci; > struct edac_mc_layer layers[1]; > struct ghes_edac_dimm_fill dimm_fill; > - int idx; > + int idx = -1; > > - /* Check if safe to enable on this system */ > - idx = acpi_match_platform_list(plat_list); > - if (!force_load && idx < 0) > - return -ENODEV; > + if (IS_ENABLED(CONFIG_X86)) { > + /* Check if safe to enable on this system */ > + idx = acpi_match_platform_list(plat_list); > + if (!force_load && idx < 0) > + return -ENODEV; > + } else { > + idx = 0; > + } > > /* > * We have only one logical memory controller to which all DIMMs belong. >