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Wed, 13 May 2020 15:33:42 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id EA9B2C43636; Wed, 13 May 2020 15:33:41 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4A27DC433D2; Wed, 13 May 2020 15:33:41 +0000 (UTC) MIME-Version: 1.0 Date: Wed, 13 May 2020 21:03:41 +0530 From: Sai Prakash Ranjan To: Mike Leach Subject: Re: [PATCH] coresight: dynamic-replicator: Fix handling of multiple connections In-Reply-To: References: <20200426143725.18116-1-saiprakash.ranjan@codeaurora.org> <84918e7d-c933-3fa1-a61e-0615d4b3cf2c@arm.com> <668ea1283a6dd6b34e701972f6f71034@codeaurora.org> <5b0f5d77c4eec22d8048bb0ffa078345@codeaurora.org> <759d47de-2101-39cf-2f1c-cfefebebd548@arm.com> <7d343e96cf0701d91152fd14c2fdec42@codeaurora.org> <47f6d51bfad0a0bf1553e101e6a2c8c9@codeaurora.org> <37b3749e-2363-0877-c318-9c334a5d1881@arm.com> <364049a30dc9d242ec611bf27a16a6c9@codeaurora.org> Message-ID: <5a76926a6532d3f91cca169d474ba98e@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200513_083421_184458_CA3D6E68 X-CRM114-Status: GOOD ( 19.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mathieu Poirier , Suzuki K Poulose , linux-arm-msm@vger.kernel.org, Linux Kernel Mailing List , Stephen Boyd , Russell King , linux-arm-kernel Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mike, On 2020-05-13 03:22, Mike Leach wrote: [...] > > Looking at the AMBA driver there is a comment there that AMBA does not > lose state when clocks are removed. This is consistent with the AMBA > protocol spec which states that AMBA slaves can only be accessed / > read / write on various strobe signals, or state reset on PRESET > signal, all timed by the rising edge of the bus clock. state changes > are not permitted on clock events alone. Given this static nature of > AMBA slaves then removing the clock should not have any effect. > > The AMBA driver only /drivers/amba/bus.c gives permission to > remove/restore the clocks from the devices (pm_suspend pm_resume > callbacks) - this reduces the power consumption of these devices if > the clock is not running, but state must be retained. > Thanks for the clarification. >> >> >> >> >> >> pid=0x2bb909 for both replicators. So part number is same. >> >> >> UCI will be different for different implementation(QCOM maybe >> >> >> different from ARM), >> >> >> but will it be different for different replicators under the same >> >> >> impl(i.e., on QCOM). >> >> > >> >> > May be use PIDR4.DES_2 to match the Implementor and apply the work >> >> > around for all QCOM replicators ? >> >> > >> >> > To me that sounds the best option. >> >> > >> >> >> > >> > I agree, if it can be established that the register values that make >> > up UCI (pid0-4, devarch, devtype, PID:CLASS==0x9), can correctly >> > identify the parts then a flag can be set in the probe() function and >> > acted on during the enable() function. >> > >> >> So here I have a doubt as to why we need to use UCI because PID = >> 0x2bb909 >> and CID = 0xb105900d are same for both replicators, so UCI won't >> identify the >> different replicators(in same implementation i.e., on QCOM) here. >> Am I missing something? >> >> Thats why I think Suzuki suggested to use PIDR4_DES2 and check for >> QCOM >> impl >> and add a workaround for all replicators, something like below: (will >> need cleaning) >> >> #define PIDR4_DES2 0xFD0 >> >> if (FIELD_GET(GENMASK(3, 0), readl_relaxed(drvdata->base + >> PIDR4_DES2)) >> == 0x4) >> id0val = id1val = 0xff; >> > > Please look at the CoreSight components specification 3.0 (ARM IHI > 0029E) Section B2.1.2 which describes the Unique Component Identifier > (UCI). > As mentioned above this consists of a combination of bits from > multiple registers, including PIDR4. > Ok got it now, thanks for clearing the doubt. I will go ahead with this method to identify QCOM impl and post a patch. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel