From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71700C433E0 for ; Fri, 5 Feb 2021 17:42:32 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1814764DD4 for ; Fri, 5 Feb 2021 17:42:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1814764DD4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=OW6hORqKlaLaGGrkUmg4FwLpvNhjPZ1JEYogSObCOUk=; b=2Pq0QNm+35U/9wCoo8bawVRLZ lzCL+cJVfkHDEn1hHLWSeI0YPizb7PhxQwNp3k/AQiNEIzw79TuJ1LvldFOGmJq58Fnrxk1Y5BDfc 8+roVohHhIAMnn9jipkCZWeUSi72/Gk74NlInS0R4IkBEwIxMeeH8c9ANkBwn/TCeSKsipaRtGiHz gS60OXeq+ifMSMkKR2YiaZpCAup8I1F1lIufIZEUD5aBVanv0fGfa+KKCVhF/laluaiUsitEOxrVu lsvthxvvYbq2diDKOddxRlpzV9xfU4J2AP2/6RvTPN7FAFeiZE+rboQkLI2tE5KeLpChwRnIMkpZA ldVcDCplA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l856l-0007cr-GP; Fri, 05 Feb 2021 17:41:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l856i-0007bJ-0B for linux-arm-kernel@lists.infradead.org; Fri, 05 Feb 2021 17:41:25 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1A46731B; Fri, 5 Feb 2021 09:41:21 -0800 (PST) Received: from [10.57.60.124] (unknown [10.57.60.124]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E32173F718; Fri, 5 Feb 2021 09:41:18 -0800 (PST) Subject: Re: [PATCH] arm64: Extend workaround for erratum 1024718 to all versions of Cortex-A55 To: Will Deacon References: <20210203230057.3961239-1-suzuki.poulose@arm.com> <20210204095457.GA20361@willie-the-truck> From: Suzuki K Poulose Message-ID: <5a8ea892-98bb-e02e-cced-9ffa7e0bbda9@arm.com> Date: Fri, 5 Feb 2021 17:41:05 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <20210204095457.GA20361@willie-the-truck> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210205_124124_156808_9829FAD6 X-CRM114-Status: GOOD ( 24.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, Kunihiko Hayashi , James Morse , stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Will On 2/4/21 9:54 AM, Will Deacon wrote: > Hi Suzuki, > > On Wed, Feb 03, 2021 at 11:00:57PM +0000, Suzuki K Poulose wrote: >> The erratum 1024718 affects Cortex-A55 r0p0 to r2p0. However >> we apply the work around for r0p0 - r1p0. Unfortunately this >> won't be fixed for the future revisions for the CPU. Thus >> extend the work around for all versions of A55, to cover >> for r2p0 and any future revisions. >> >> Cc: stable@vger.kernel.org >> Cc: Catalin Marinas >> Cc: Will Deacon >> Cc: James Morse >> Cc: Kunihiko Hayashi >> Signed-off-by: Suzuki K Poulose >> --- >> arch/arm64/kernel/cpufeature.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c >> index e99eddec0a46..db400ca77427 100644 >> --- a/arch/arm64/kernel/cpufeature.c >> +++ b/arch/arm64/kernel/cpufeature.c >> @@ -1455,7 +1455,7 @@ static bool cpu_has_broken_dbm(void) >> /* List of CPUs which have broken DBM support. */ >> static const struct midr_range cpus[] = { >> #ifdef CONFIG_ARM64_ERRATUM_1024718 >> - MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 >> + MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), > > I think we have bigger problems with this erratum, since cpu_has_hw_af() > doesn't taken this erratum into account at all, meaning that > arch_faults_on_old_pte() will return the wrong value on any system with an > A55. Please note that we enable HW_AF on these CPUs even with this erratum as they are not affected. It is only the DBM that we selectively disable. Thus the AF flag checks are still valid (See __cpu_setup in arch/arm64/mm/proc.S). Or am I miss something ? Kind regards Suzuki > > Please can you fix that along with this patch? You'll need to pay extra > attention to the stuff I've queued on for-next/faultaround, where we will > actually want arch_wants_old_prefaulted_pte() to return 'true' if any of the > CPUs have DBM, since it's a pure performance thing. > > Cheers, > > Will > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel