From: Anshuman Khandual <anshuman.khandual@arm.com>
To: "Rob Herring (Arm)" <robh@kernel.org>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Jonathan Corbet <corbet@lwn.net>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
James Clark <james.clark@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH v19 02/11] perf: arm_pmu: Don't disable counter in armpmu_add()
Date: Mon, 3 Feb 2025 11:34:24 +0530 [thread overview]
Message-ID: <5bcc9ffb-62a0-4b98-9b41-9cf1786751a6@arm.com> (raw)
In-Reply-To: <20250202-arm-brbe-v19-v19-2-1c1300802385@kernel.org>
On 2/3/25 06:12, Rob Herring (Arm) wrote:
> From: Mark Rutland <mark.rutland@arm.com>
>
> Currently armpmu_add() tries to handle a newly-allocated counter having
> a stale associated event, but this should not be possible, and if this
A stale associated event ? Does that mean hw_events->events[idx] still
points to a valid event even though counter idx has already been freed
up and allocated to a new event.
> were to happen the current mitigation is insufficient and potentially
> expensive. It would be better to warn if we encounter the impossible
> case.
Makes sense.
>
> Calls to pmu::add() and pmu::del() are serialized by the core perf code,
> and armpmu_del() clears the relevant slot in pmu_hw_events::events[]
> before clearing the bit in pmu_hw_events::used_mask such that the
> counter can be reallocated. Thus when armpmu_add() allocates a counter
> index from pmu_hw_events::used_mask, it should not be possible to observe
> a stale even in pmu_hw_events::events[] unless either
> pmu_hw_events::used_mask or pmu_hw_events::events[] have been corrupted.
>
> If this were to happen, we'd end up with two events with the same
> event->hw.idx, which would clash with each other during reprogramming,
> deletion, etc, and produce bogus results. Add a WARN_ON_ONCE() for this
> case so that we can detect if this ever occurs in practice.
Agreed.
>
> That possiblity aside, there's no need to call arm_pmu::disable(event)
s/possiblity/possibility
> for the new event. The PMU reset code initialises the counter in a
> disabled state, and armpmu_del() will disable the counter before it can
> be reused. Remove the redundant disable.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> ---
> drivers/perf/arm_pmu.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
> index 398cce3d76fc..2f33e69a8caf 100644
> --- a/drivers/perf/arm_pmu.c
> +++ b/drivers/perf/arm_pmu.c
> @@ -342,12 +342,10 @@ armpmu_add(struct perf_event *event, int flags)
> if (idx < 0)
> return idx;
>
> - /*
> - * If there is an event in the counter we are going to use then make
> - * sure it is disabled.
> - */
> + /* The newly-allocated counter should be empty */
Should this comment also include what happens when two events some how end
up using the same 'event->hw.idx' as mentioned in the commit message, just
to make things clearer.
> + WARN_ON_ONCE(hw_events->events[idx]);
> +
> event->hw.idx = idx;
> - armpmu->disable(event);
> hw_events->events[idx] = event;
>
> hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
>
Otherwise LGTM.
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
next prev parent reply other threads:[~2025-02-03 6:06 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-03 0:42 [PATCH v19 00/11] arm64/perf: Enable branch stack sampling Rob Herring (Arm)
2025-02-03 0:42 ` [PATCH v19 01/11] perf: arm_pmuv3: Call kvm_vcpu_pmu_resync_el0() before enabling counters Rob Herring (Arm)
2025-02-03 4:07 ` Anshuman Khandual
2025-02-03 0:42 ` [PATCH v19 02/11] perf: arm_pmu: Don't disable counter in armpmu_add() Rob Herring (Arm)
2025-02-03 6:04 ` Anshuman Khandual [this message]
2025-02-03 0:42 ` [PATCH v19 03/11] perf: arm_pmuv3: Don't disable counter in armv8pmu_enable_event() Rob Herring (Arm)
2025-02-03 6:38 ` Anshuman Khandual
2025-02-03 0:42 ` [PATCH v19 04/11] perf: arm_v7_pmu: Drop obvious comments for enabling/disabling counters and interrupts Rob Herring (Arm)
2025-02-03 4:09 ` Anshuman Khandual
2025-02-03 0:42 ` [PATCH v19 05/11] perf: arm_v7_pmu: Don't disable counter in (armv7|krait_|scorpion_)pmu_enable_event() Rob Herring (Arm)
2025-02-03 6:54 ` Anshuman Khandual
2025-02-03 0:43 ` [PATCH v19 06/11] perf: apple_m1: Don't disable counter in m1_pmu_enable_event() Rob Herring (Arm)
2025-02-03 8:10 ` Anshuman Khandual
2025-02-03 0:43 ` [PATCH v19 07/11] perf: arm_pmu: Move PMUv3-specific data Rob Herring (Arm)
2025-02-03 8:16 ` Anshuman Khandual
2025-02-03 0:43 ` [PATCH v19 08/11] arm64/sysreg: Add BRBE registers and fields Rob Herring (Arm)
2025-02-03 8:32 ` Anshuman Khandual
2025-02-03 0:43 ` [PATCH v19 09/11] arm64: Handle BRBE booting requirements Rob Herring (Arm)
2025-02-03 8:47 ` Anshuman Khandual
2025-02-12 12:10 ` Leo Yan
2025-02-12 21:21 ` Rob Herring
2025-02-13 12:27 ` Leo Yan
2025-02-03 0:43 ` [PATCH v19 10/11] KVM: arm64: nvhe: Disable branch generation in nVHE guests Rob Herring (Arm)
2025-02-03 9:16 ` Anshuman Khandual
2025-02-03 11:28 ` James Clark
2025-02-13 17:03 ` Leo Yan
2025-02-13 23:16 ` Rob Herring
2025-02-14 9:55 ` Leo Yan
2025-02-18 14:17 ` Rob Herring
2025-02-03 0:43 ` [PATCH v19 11/11] perf: arm_pmuv3: Add support for the Branch Record Buffer Extension (BRBE) Rob Herring (Arm)
2025-02-03 16:53 ` James Clark
2025-02-03 17:58 ` Rob Herring
2025-02-04 12:02 ` James Clark
2025-02-04 15:03 ` Rob Herring
2025-02-05 14:38 ` James Clark
2025-02-05 14:51 ` James Clark
2025-02-05 16:15 ` Rob Herring
2025-02-06 12:58 ` James Clark
2025-02-12 18:52 ` Leo Yan
2025-02-12 19:00 ` Leo Yan
2025-02-13 16:16 ` Leo Yan
2025-02-13 17:13 ` Rob Herring
2025-02-13 17:45 ` Leo Yan
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