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[2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id f19-20020ac84713000000b00437392f1c20sm1652949qtp.76.2024.05.03.08.06.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 May 2024 08:07:00 -0700 (PDT) Date: Fri, 3 May 2024 17:06:54 +0200 (CEST) From: Sebastian Ott To: Oliver Upton cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, Marc Zyngier , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: Re: [PATCH v2 2/6] KVM: arm64: unify trap setup code In-Reply-To: Message-ID: <5c17b8e9-9281-f6ef-df71-11821e19b112@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> <20240426104950.7382-3-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240503_080707_280198_6E79611E X-CRM114-Status: GOOD ( 17.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 1 May 2024, Oliver Upton wrote: > On Fri, Apr 26, 2024 at 12:49:46PM +0200, Sebastian Ott wrote: >> There are 2 functions to set up traps via HCR_EL2: > > nitpick: these functions *calculate* the trap values, but do not > actually set them up. HCR_EL2 doesn't get written to until further down > the line on KVM_RUN. > >> + if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) { >> + vcpu->arch.hcr_el2 |= HCR_FWB; >> + } else { >> + /* >> + * For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C >> + * get set in SCTLR_EL1 such that we can detect when the guest >> + * MMU gets turned on and do the necessary cache maintenance >> + * then. >> + */ >> + vcpu->arch.hcr_el2 |= HCR_TVM; >> + } > > It seems to me like calling this once for the lifetime of a vCPU will > break non-FWB behavior. > > Like the comment suggests, these traps are needed to catch the moment > the S1 MMU is turned on and do cache maintenance to make sure D$ agrees > with what the guest was doing before enabling the MMU. > > KVM_ARM_VCPU_INIT resets SCTLR_EL1, but it seems we'd miss setting > HCR_TVM in that case. Ugh, I didn't think about KVM_ARM_VCPU_INIT being called more than once. But in that case don't we loose the changes done to hcr_el2 in the current code? E.g.: void kvm_init_sysreg(struct kvm_vcpu *vcpu) { ... if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS)) vcpu->arch.hcr_el2 |= HCR_TTLBOS; ... } static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) { vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS; ... } Thanks, Sebastian _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel