From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D4FEC433DF for ; Fri, 16 Oct 2020 11:22:45 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 096492054F for ; Fri, 16 Oct 2020 11:22:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Pr6DqH6A" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 096492054F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5lyOyfvACGCNCfFkjFsTQDfHL0yjzxMOSUi3p3DiFXw=; b=Pr6DqH6AUWFIYGSFKCghJM1iX IU1EEsnUGFAXtYLbC/q5KS0jxY+dgeuZGCI8qeU1cDdl/QpKJAtjiAhwHu7AXFJg3ljhdbYttKU+m bJq/hh3O6Ykj0aum69uNQXN/ENMvOcIoEFu9MPK5KP+TxEq44nB87k73JU3MoqO2dgOouxFEtdJPD 3jZ3KK8xlQBA185BE+6xcjbVdsZF22cQHaYwQhkIEHOEs+S+GhoHyW0pMn8GrVXDSi/l8LJ3ZLgQy RYKfPdcgfQgXIop6rblLh71B1Cd7IZkjeCP07nbYraJQTmiugLNZwLabrzo4l//yTHO6D8Vbf2C3Z dirnH6vrQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kTNnW-0003MY-IA; Fri, 16 Oct 2020 11:21:22 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kTNnT-0003M0-RN for linux-arm-kernel@lists.infradead.org; Fri, 16 Oct 2020 11:21:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0B38ED6E; Fri, 16 Oct 2020 04:21:19 -0700 (PDT) Received: from [10.57.50.28] (unknown [10.57.50.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1EFC43F719; Fri, 16 Oct 2020 04:21:16 -0700 (PDT) Subject: Re: [PATCH] coresight: etm4x: Skip setting LPOVERRIDE bit for qcom,skip-power-up To: Sai Prakash Ranjan , Mathieu Poirier , Mike Leach References: <20201016101025.26505-1-saiprakash.ranjan@codeaurora.org> From: Suzuki Poulose Message-ID: <5c4f6f5d-b07d-0816-331f-7c7463fa99b3@arm.com> Date: Fri, 16 Oct 2020 12:21:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: <20201016101025.26505-1-saiprakash.ranjan@codeaurora.org> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201016_072119_936995_87652614 X-CRM114-Status: GOOD ( 20.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: denik@chromium.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Stephen Boyd , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Sai, On 10/16/20 11:10 AM, Sai Prakash Ranjan wrote: > There is a bug on the systems supporting to skip power up > (qcom,skip-power-up) where setting LPOVERRIDE bit(low-power > state override behaviour) will result in CPU hangs/lockups > even on the implementations which supports it. So skip > setting the LPOVERRIDE bit for such platforms. > > Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit power up") > Signed-off-by: Sai Prakash Ranjan The fix is fine by me. Btw, is there a hardware Erratum assigned for this ? It would be good to have the Erratum documented somewhere, preferrably ( Documentation/arm64/silicon-errata.rst ) > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index abd706b216ac..6096d7abf80d 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -779,7 +779,7 @@ static void etm4_init_arch_data(void *info) > * LPOVERRIDE, bit[23] implementation supports > * low-power state override > */ > - if (BMVAL(etmidr5, 23, 23)) > + if (BMVAL(etmidr5, 23, 23) && (!drvdata->skip_power_up)) > drvdata->lpoverride = true; > else > drvdata->lpoverride = false; > > base-commit: 3477326277451000bc667dfcc4fd0774c039184c > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel