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Tue, 11 Nov 2025 06:50:58 -0800 (PST) X-Google-Smtp-Source: AGHT+IHeUjej48jQjUKrbDfpu/j0dgTD8cgD0cCmhW/5bvBfjdYMThBsF6L1pVJDVnEci/p3XVNrpg== X-Received: by 2002:a17:902:f791:b0:295:9e4e:4090 with SMTP id d9443c01a7336-297e5712c4amr144628625ad.52.1762872657520; Tue, 11 Nov 2025 06:50:57 -0800 (PST) Received: from [10.92.180.19] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b0cc179e7esm15787230b3a.46.2025.11.11.06.50.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Nov 2025 06:50:57 -0800 (PST) Message-ID: <5c83c9a1-e123-95bb-1434-588ee8c52b25@oss.qualcomm.com> Date: Tue, 11 Nov 2025 20:20:43 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH v17 03/12] power: reset: reboot-mode: Add support for 64 bit magic Content-Language: en-US To: Bjorn Andersson Cc: Mukesh Ojha , Bartosz Golaszewski , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Conor Dooley , Andy Yan , Mark Rutland , Lorenzo Pieralisi , Arnd Bergmann , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Vinod Koul , Catalin Marinas , Will Deacon , Florian Fainelli , Moritz Fischer , John Stultz , Matthias Brugger , Krzysztof Kozlowski , Dmitry Baryshkov , Stephen Boyd , Andre Draszik , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Xin Liu , Srinivas Kandagatla , Umang Chheda , Nirmesh Kumar Singh References: <20251109-arm-psci-system_reset2-vendor-reboots-v17-0-46e085bca4cc@oss.qualcomm.com> <20251109-arm-psci-system_reset2-vendor-reboots-v17-3-46e085bca4cc@oss.qualcomm.com> <20251110134529.uljjqzb3vhda3vya@hu-mojha-hyd.qualcomm.com> <681a72ba-d8fb-bfc2-d2bb-d80ac667bc5c@oss.qualcomm.com> From: Shivendra Pratap In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTExMDExOSBTYWx0ZWRfX/XMu/2kEcvWe Xi84lCUKs11ZPJzXMQzHE6mtMbVfQhqGDEu2rEm4hsYwYWZNSdC9zUPBx0bmYkSHULASPSynMks 2Fyxo9BJXojJvaJdLnkVt5JkW0TnOpbl4ZCBpyXRq0YwyVshf5Y1Q92zOkcbS67XZh4KvoduF2z JA+RDH+RdHMq1Rhc30Y7eXYv3ujG1VnBAnchN4/oegyU7Lk/5gTIYzj77uJI2mDbmGYh25dzRop PCjH0/0aWECOFBfAdnqEeHOR+BgA0+JaY5GO4zSqM540MsCmdugqGLKtcp+YCfM5FbcdPGRxl+i TbqsQjbr7bhG0ZwdHFM/G3xfp042acmGhDFw1pRAj12HoMocawOPHjw87FQ0LuiFPH4JEgUSkBL xTtp+YgsmrdVtcK0Q+kxZVXrTq613w== X-Proofpoint-ORIG-GUID: aMPvtIVEfAel8ragN6yN8KUkHNkMb3a8 X-Authority-Analysis: v=2.4 cv=L94QguT8 c=1 sm=1 tr=0 ts=69134d53 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=WYJ1fy7EX9OiPUot37EA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: aMPvtIVEfAel8ragN6yN8KUkHNkMb3a8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-11_02,2025-11-11_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 adultscore=0 phishscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511110119 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251111_065100_507944_7B6B3DCB X-CRM114-Status: GOOD ( 29.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/11/2025 12:03 AM, Bjorn Andersson wrote: > On Mon, Nov 10, 2025 at 11:22:40PM +0530, Shivendra Pratap wrote: >> >> >> On 11/10/2025 10:00 PM, Bjorn Andersson wrote: >>> On Mon, Nov 10, 2025 at 07:15:29PM +0530, Mukesh Ojha wrote: >>>> On Sun, Nov 09, 2025 at 08:07:16PM +0530, Shivendra Pratap wrote: >>>>> Current reboot-mode supports a single 32-bit argument for any >>>>> supported mode. Some reboot-mode based drivers may require >>>>> passing two independent 32-bit arguments during a reboot >>>>> sequence, for uses-cases, where a mode requires an additional >>>>> argument. Such drivers may not be able to use the reboot-mode >>>>> driver. For example, ARM PSCI vendor-specific resets, need two >>>>> arguments for its operation – reset_type and cookie, to complete >>>>> the reset operation. If a driver wants to implement this >>>>> firmware-based reset, it cannot use reboot-mode framework. >>>>> >>>>> Introduce 64-bit magic values in reboot-mode driver to >>>>> accommodate dual 32-bit arguments when specified via device tree. >>>>> In cases, where no second argument is passed from device tree, >>>>> keep the upper 32-bit of magic un-changed(0) to maintain backward >>>>> compatibility. >>>>> >>>>> Update the current drivers using reboot-mode for a 64-bit magic >>>>> value. >> >> [SNIP..] >> >>>>> + if (magic > U32_MAX) >>>>> + return -EINVAL; >>>>> + >>>>> + magic_32 = magic; >>>>> + >>>>> syscon_rbm = container_of(reboot, struct syscon_reboot_mode, reboot); >>>>> >>>>> ret = regmap_update_bits(syscon_rbm->map, syscon_rbm->offset, >>>>> - syscon_rbm->mask, magic); >>>>> + syscon_rbm->mask, magic_32); >>> >>> As above, if we're no longer silently discarding bits, I think we should >>> compare the magic against syscon_rbm->mask. >>> >>> No need for a local variable, just type cast after checking the validity. >> >> Trying to summarize below why we added these check- >> >> the patch in v11 used typecasting and did not have any of these checks(link below): >> https://lore.kernel.org/all/20250717-arm-psci-system_reset2-vendor-reboots-v11-2-df3e2b2183c3@oss.qualcomm.com/ >> >> As per below upstream review, type cast was removed and bound checks were added all-over patchset: >> "As a general rule of thumb, code with casts is poor quality code. Try >> to write the code without casts." - >> https://lore.kernel.org/all/8d4a42b6-657f-4c30-8e25-4213d8d53a89@lunn.ch/ >> >> We can revert to the typecast way. Please suggest. >> > > Okay, I'm okay with Andrew's original request, stick to that for the > nvmem case. Although I don't fancy the name "magic_32", and would prefer > that you just call it "value" or something. sure will make it proper wherever applicable. > > > For pon and syscon however, I'm wondering why you have ignored Andrew's > other request from that same email: > > """ > You might be able to go further, and validate that magic actually fits > into the field when you consider the << pon->reason_shift. > """ > > Writing "if (magic > U32_MAX)" in a snippet of code where magic isn't > allowed to be more than either 32 or 64 is misleading. > > For syscon, it's true that the parameter is an unsigned long, but the > actual limit better be based on syscon_rbm->mask. May be i was not able to interpret it correctly. Basically tried to make sure that magic that now coming in a "u64 magic" should be passed ahead only it its a 32 bit value. So should i get rid of the checks done here for syscon and pon? thanks, Shivendra