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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1goVUg-0005xH-Ek; Tue, 29 Jan 2019 15:40:10 +0000 Received: from relay4-d.mail.gandi.net ([217.70.183.196]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1goVUd-00053c-DC for linux-arm-kernel@lists.infradead.org; Tue, 29 Jan 2019 15:40:09 +0000 X-Originating-IP: 90.88.147.226 Received: from aptenodytes (aaubervilliers-681-1-27-226.w90-88.abo.wanadoo.fr [90.88.147.226]) (Authenticated sender: paul.kocialkowski@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id A74F1E0013; Tue, 29 Jan 2019 15:39:53 +0000 (UTC) Message-ID: <5ca088ece86f8ee6033d481c7f9e86128fc5e355.camel@bootlin.com> Subject: Re: [PATCH 1/4] drm/sun4i: dsi: Restrict DSI tcon clock divider From: Paul Kocialkowski To: Maxime Ripard , Maarten Lankhorst , Sean Paul Date: Tue, 29 Jan 2019 16:39:53 +0100 In-Reply-To: <92e4e5f4c58c8c1a439e93614fdcd8bad6823358.1548236066.git-series.maxime.ripard@bootlin.com> References: <92e4e5f4c58c8c1a439e93614fdcd8bad6823358.1548236066.git-series.maxime.ripard@bootlin.com> Organization: Bootlin User-Agent: Evolution 3.30.4 Mime-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190129_074007_648369_9B0D21BD X-CRM114-Status: GOOD ( 16.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bbrezillon@kernel.org, dri-devel@lists.freedesktop.org, Chen-Yu Tsai , Thomas Petazzoni , Jagan Teki , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Wed, 2019-01-23 at 16:54 +0100, Maxime Ripard wrote: > The current code allows the TCON clock divider to have a range between 4 > and 127 when feeding the DSI controller. > > The only display supported so far had a display clock rate that ended up > using a divider of 4, but testing with other displays show that only 4 > seems to be functional. > > This also aligns with what Allwinner is doing in their BSP, so let's just > hardcode that we want a divider of 4 when using the DSI output. > > Signed-off-by: Maxime Ripard Reviewed-by: Paul Kocialkowski Cheers, Paul > --- > drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++-- > drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 2 ++ > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c > index 0420f5c978b9..bee73ead732a 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > @@ -341,8 +341,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, > u32 block_space, start_delay; > u32 tcon_div; > > - tcon->dclk_min_div = 4; > - tcon->dclk_max_div = 127; > + tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; > + tcon->dclk_max_div = SUN6I_DSI_TCON_DIV; > > sun4i_tcon0_mode_set_common(tcon, mode); > > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h > index dbbc5b3ecbda..6d4a3c0fd9b5 100644 > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h > @@ -13,6 +13,8 @@ > #include > #include > > +#define SUN6I_DSI_TCON_DIV 4 > + > struct sun6i_dphy { > struct clk *bus_clk; > struct clk *mod_clk; -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel