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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jrCyC-0000fj-L7; Fri, 03 Jul 2020 04:06:36 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jrCy9-0000de-5N for linux-arm-kernel@lists.infradead.org; Fri, 03 Jul 2020 04:06:34 +0000 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C812CD09CA642B69DF95; Fri, 3 Jul 2020 12:06:18 +0800 (CST) Received: from [10.174.178.63] (10.174.178.63) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 3 Jul 2020 12:06:17 +0800 From: "liwei (GF)" Subject: Re: [PATCH 2/2] perf tools: Fix record failure when mixed with ARM SPE event To: Mathieu Poirier References: <20200623123141.27747-1-liwei391@huawei.com> <20200623123141.27747-3-liwei391@huawei.com> <20200702230322.GB471976@xps15> Message-ID: <5d872f6f-3665-5abd-7251-13926a70f793@huawei.com> Date: Fri, 3 Jul 2020 12:06:15 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.3.1 MIME-Version: 1.0 In-Reply-To: <20200702230322.GB471976@xps15> X-Originating-IP: [10.174.178.63] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200703_000633_914398_7D5FE3A1 X-CRM114-Status: GOOD ( 32.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Kim Phillips , Suzuki K Poulose , Alexander Shishkin , linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , leo.yan@linaro.org, Namhyung Kim , Jiri Olsa , linux-arm-kernel@lists.infradead.org, Mike Leach Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mathieu, On 2020/7/3 7:03, Mathieu Poirier wrote: > Hi Li, > > On Tue, Jun 23, 2020 at 08:31:41PM +0800, Wei Li wrote: >> When recording with cache-misses and arm_spe_x event, i found that >> it will just fail without showing any error info if i put cache-misses >> after arm_spe_x event. >> >> [root@localhost 0620]# perf record -e cache-misses -e \ >> arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\ >> jitter=1,store_filter=1,min_latency=0/ sleep 1 >> [ perf record: Woken up 1 times to write data ] >> [ perf record: Captured and wrote 0.067 MB perf.data ] >> [root@localhost 0620]# perf record -e \ >> arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\ >> store_filter=1,min_latency=0/ -e cache-misses sleep 1 >> [root@localhost 0620]# >> >> Finally, i found the reason is that the parameter 'arm_spe_pmu' passed to >> arm_spe_recording_init() in auxtrace_record__init() is wrong. When the >> arm_spe_x event is not the last event, 'arm_spe_pmus[i]' will be out of >> bounds. > > Yes, this indeed broken. > > The current code can only work if the only event to be > traced is an arm_spe_X, or if it is the last event to be specified. > Otherwise the last event type will be checked against all the > arm_spe_pmus[i]->types, none will match and an out of bound i index will be > used in arm_spc_recording_init(). > > Since this problem is not easy to figure out please include the above > explanation in the changelog. OK. >> >> It seems that the code can't support concurrent multiple different >> arm_spe_x events currently. So add the code to check and record the >> found 'arm_spe_pmu' to fix this issue. >> >> In fact, we don't support concurrent multiple same arm_spe_x events either, >> that is checked in arm_spe_recording_options(), and it will show the >> relevant info. >> >> Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support") >> Signed-off-by: Wei Li >> --- >> tools/perf/arch/arm/util/auxtrace.c | 10 +++++++++- >> 1 file changed, 9 insertions(+), 1 deletion(-) >> >> diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c >> index 62b7b03d691a..7bb6f29e766c 100644 >> --- a/tools/perf/arch/arm/util/auxtrace.c >> +++ b/tools/perf/arch/arm/util/auxtrace.c >> @@ -58,6 +58,7 @@ struct auxtrace_record >> bool found_etm = false; >> bool found_spe = false; >> static struct perf_pmu **arm_spe_pmus; >> + static struct perf_pmu *arm_spe_pmu; > > As far as I can tell the "static" doesn't do anything. > I will remove that in v2. >> static int nr_spes = 0; >> int i = 0; >> >> @@ -77,6 +78,13 @@ struct auxtrace_record >> >> for (i = 0; i < nr_spes; i++) { >> if (evsel->core.attr.type == arm_spe_pmus[i]->type) { >> + if (found_spe && (arm_spe_pmu != arm_spe_pmus[i])) { >> + pr_err("Concurrent multiple SPE operation not currently supported\n"); >> + *err = -EOPNOTSUPP; >> + return NULL; >> + } > > Instead of the above, which as you rightly pointed out, is also done in > arm_spe_recording_options() it might be best to just fix the "if (!nr_spes)" > condition: > if (!nr_spes || arm_spe_pmu) > continue This is more brief, i will use 'found_spe' as 'arm_spe_pmu' is not initialized. > Furthermore, instead of having a new arm_spe_pmu variable you could simply make > found_spe a struct perf_pmu. That would be one less variable to take care of. > >> + >> + arm_spe_pmu = arm_spe_pmus[i]; >> found_spe = true; > > Last but not least do you know where the memory allocated for array arm_spe_pmus > is released? If you can't find it either then we have a memory leak and it > would be nice to have that fixed. Yes, we have a memory leak here indeed, i forgot to free it in this function. As 'arm_spe_pmus' is defined as static, i think the author meant to assign it only at the first call, but this function is only called once when we executing 'record', should i go on fixing it or just drop the patch 1? > Regards > Mathieu > > PS: Leo Yan has spent a fair amount of time in the SPE code - please CC him on > your next revision. > Thanks, Wei _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel