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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84c2adc7adasm4962151b3a.19.2026.07.19.20.09.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 19 Jul 2026 20:09:38 -0700 (PDT) Message-ID: <5eaff736-9271-487a-a9d2-225580ff449d@gmail.com> Date: Mon, 20 Jul 2026 11:09:35 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] dt-bindings: iio: adc: Add Nuvoton MA35D1 EADC To: Rob Herring Cc: Jonathan Cameron , jic23@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, linux-arm-kernel@lists.infradead.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cwweng@nuvoton.com References: <20260713081127.115197-1-cwweng.linux@gmail.com> <20260713081127.115197-2-cwweng.linux@gmail.com> <20260716174237.00004b79@oss.qualcomm.com> <8d757505-ea93-4dd4-a374-79f143f6f949@gmail.com> Content-Language: en-US From: Chi-Wen Weng In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260719_200940_721340_645B46F7 X-CRM114-Status: GOOD ( 13.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, Thank you for the clarification. > No, document what the h/w has, not what a driver currently uses. The > only exception I can think of here would be if only 1 interrupt pin is > usable on a given system. Then it would be just 1 interrupt with > interrupt-names to define which one is used. Understood. I incorrectly based the binding on the current driver implementation rather than the hardware resources. MA35D1 has one EADC controller, EADC0, and all four interrupt outputs, ADINT0 through ADINT3, are connected to separate GIC interrupt lines. ADINT0, ADINT1 and ADINT2 are generated from the corresponding ADIF0, ADIF1 and ADIF2 conversion interrupt flags. ADINT3 is a shared interrupt output and can be generated by ADIF3 or by any of the ADCMPF0 through ADCMPF3 result-compare flags. I will therefore keep all four interrupt entries in the v3 binding and add interrupt-names for "adint0", "adint1", "adint2" and "adint3". The ADINT3 description will state that it is shared by the conversion and result-compare interrupt sources. The initial driver will continue to request and use only "adint0", but that implementation limitation will not restrict the hardware description in the binding. I will also remove the redundant maxItems property because the fixed items list already specifies the number of interrupt entries. Thanks, Chi-Wen