From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A632C433E0 for ; Mon, 1 Mar 2021 13:56:47 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 34F7E64ED6 for ; Mon, 1 Mar 2021 13:56:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 34F7E64ED6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ShNNXnUNAuCivRJhdeKQcW8jBparI0UN1zOQj365vLY=; b=AZ00OQ7wCZBwQ9t6MpCwvKIpw swYm3uaBSFLNKK7IP9G0B9s19IJMm6S9HZDTEn5RgAGeZNLqO/edCkUM9JO4u7NFp/cxyZZTEZ2mN MdTVpIlWBzoXoABILOxesPA8xSISaLxoyjYGidT9F2Sf7/b8qWaMDiDkusN/MWygKeOAGbhirP5xL V1+10EjSBSh2Gjp63D8qfyOA7Nhn+CByp/vjSPplTlSHSJrM7AoNXoO2u2nUWeNCJ+97nkMa5MSAM HVYFJGJoGzmCvYzMScLRZMRZ0ZtuhWpjRAYE9ZbpGDTKnMHWar5AH0IEJiPME3nnx3xY2KFbpHtOl 1PgUbo0NQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lGj13-0003Rg-1B; Mon, 01 Mar 2021 13:55:17 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lGj10-0003RH-OW for linux-arm-kernel@lists.infradead.org; Mon, 01 Mar 2021 13:55:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C12081042; Mon, 1 Mar 2021 05:54:59 -0800 (PST) Received: from [10.57.48.41] (unknown [10.57.48.41]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2DF833F70D; Mon, 1 Mar 2021 05:54:58 -0800 (PST) Subject: Re: [PATCH v4 17/19] coresight: core: Add support for dedicated percpu sinks To: kernel test robot , linux-arm-kernel@lists.infradead.org References: <20210225193543.2920532-18-suzuki.poulose@arm.com> <202102261412.zCSQLdKB-lkp@intel.com> From: Suzuki K Poulose Message-ID: <5fad098f-8cdd-e56d-3812-d85720b1768c@arm.com> Date: Mon, 1 Mar 2021 13:54:54 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <202102261412.zCSQLdKB-lkp@intel.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210301_085514_913376_0DCB756D X-CRM114-Status: GOOD ( 26.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbuild-all@lists.01.org, mathieu.poirier@linaro.org, anshuman.khandual@arm.com, linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com, leo.yan@linaro.org, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/26/21 6:34 AM, kernel test robot wrote: > Hi Suzuki, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [also build test ERROR on next-20210226] > [cannot apply to kvmarm/next arm64/for-next/core tip/perf/core v5.11] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch] > > url: https://github.com/0day-ci/linux/commits/Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 > base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 6fbd6cf85a3be127454a1ad58525a3adcf8612ab > config: arm-randconfig-r024-20210225 (attached as .config) > compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project a921aaf789912d981cbb2036bdc91ad7289e1523) > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # install arm cross compiling tool for clang build > # apt-get install binutils-arm-linux-gnueabi > # https://github.com/0day-ci/linux/commit/c37564326cdf11e0839eae06c1bfead47d3e5775 > git remote add linux-review https://github.com/0day-ci/linux > git fetch --no-tags linux-review Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 > git checkout c37564326cdf11e0839eae06c1bfead47d3e5775 > # save the attached .config to linux build tree > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot Thanks for the report. The following fixup should clear this : ---8>--- diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 8a3a3c199087..85008a65e21f 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -429,6 +429,33 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o csa->write(val, offset, false, true); } +#else /* !CONFIG_64BIT */ + +static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, + u32 offset) +{ + WARN_ON(1); + return 0; +} + +static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) +{ + WARN_ON(1); + return 0; +} + +static inline void csdev_access_relaxed_write64(struct csdev_access *csa, + u64 val, u32 offset) +{ + WARN_ON(1); +} + +static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) +{ + WARN_ON(1); +} +#endif /* CONFIG_64BIT */ + static inline bool coresight_is_percpu_source(struct coresight_device *csdev) { return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && @@ -440,32 +467,6 @@ static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); } -#else /* !CONFIG_64BIT */ - -static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, - u32 offset) -{ - WARN_ON(1); - return 0; -} - -static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) -{ - WARN_ON(1); - return 0; -} - -static inline void csdev_access_relaxed_write64(struct csdev_access *csa, - u64 val, u32 offset) -{ - WARN_ON(1); -} - -static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) -{ - WARN_ON(1); -} -#endif /* CONFIG_64BIT */ extern struct coresight_device * coresight_register(struct coresight_desc *desc); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel