From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1113C77B7A for ; Wed, 17 May 2023 01:28:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=juoZAJWWurSUqBpy9QTiYsKMeR77/m+NJA1qZC+CY3k=; b=0yNcApOMQo/8Si 96sdxqcOFueaUTumPhmEzUYQ0FjEBs4vXsPHlwFdvoBDlmrkBWG0LhbGmaTGb35zzQd+bssL7hJDG tUoGq7yLGfXhKsF4LMrWOZXj77k4E/XRDys5FrjMGJPeB6OeQqytF6uuzesDSkJiJ7EwZGRFV/SkC 2FlAfntqBGXNllxVsMje0yWKwPnSnS0lc2pdXirCbwV7FMIMhMHeI18lgaBHOFJKE8X2FBTAA5MFe PhH1wnfNDrGsfFDWnjvkbtOkeqgG4g86UmhrQjTKIZryr+wb4Fm3eMOnMFikErXDECPtfJ9cG3sAi QmVkbDyQYHU8jE54YRBg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pz5xM-007glx-11; Wed, 17 May 2023 01:27:56 +0000 Received: from out30-113.freemail.mail.aliyun.com ([115.124.30.113]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pz5xH-007gkg-2m for linux-arm-kernel@lists.infradead.org; Wed, 17 May 2023 01:27:54 +0000 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R121e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045170;MF=xueshuai@linux.alibaba.com;NM=1;PH=DS;RN=12;SR=0;TI=SMTPD_---0ViqTTPH_1684286865; Received: from 30.240.113.228(mailfrom:xueshuai@linux.alibaba.com fp:SMTPD_---0ViqTTPH_1684286865) by smtp.aliyun-inc.com; Wed, 17 May 2023 09:27:46 +0800 Message-ID: <5fceacaa-7bc4-53d3-2bb5-68a8bea9462a@linux.alibaba.com> Date: Wed, 17 May 2023 09:27:42 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 Subject: Re: [PATCH v3 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Content-Language: en-US To: Jonathan Cameron Cc: helgaas@kernel.org, yangyicong@huawei.com, will@kernel.org, baolin.wang@linux.alibaba.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, rdunlap@infradead.org, robin.murphy@arm.com, mark.rutland@arm.com, zhuo.song@linux.alibaba.com References: <20220917121036.14864-1-xueshuai@linux.alibaba.com> <20230417061729.84422-2-xueshuai@linux.alibaba.com> <20230516153233.000032f3@Huawei.com> From: Shuai Xue In-Reply-To: <20230516153233.000032f3@Huawei.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230516_182752_091362_11D7D24D X-CRM114-Status: GOOD ( 23.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2023/5/16 22:32, Jonathan Cameron wrote: > On Mon, 17 Apr 2023 14:17:27 +0800 > Shuai Xue wrote: > >> Alibaba's T-Head Yitan 710 SoC is built on Synopsys' widely deployed and >> silicon-proven DesignWare Core PCIe controller which implements PMU for > > Keep to most relevant facts in description only. Something like: > > Alibaba's T-Head Yitan 710 SoC includes Synopsys' DesignWare Core PCIe controller > which implements ... > > Or ask for advertising fees from Synopsys :) Haha, I will keep it more simple facts. > > >> performance and functional debugging to facilitate system maintenance. >> Document it to provide guidance on how to use it. >> >> Signed-off-by: Shuai Xue >> --- >> .../admin-guide/perf/dwc_pcie_pmu.rst | 61 +++++++++++++++++++ >> Documentation/admin-guide/perf/index.rst | 1 + >> 2 files changed, 62 insertions(+) >> create mode 100644 Documentation/admin-guide/perf/dwc_pcie_pmu.rst >> >> diff --git a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst >> new file mode 100644 >> index 000000000000..0672e959ebe4 >> --- /dev/null >> +++ b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst >> @@ -0,0 +1,61 @@ >> +====================================================================== >> +Synopsys DesignWare Cores (DWC) PCIe Performance Monitoring Unit (PMU) >> +====================================================================== >> + >> +DesignWare Cores (DWC) PCIe PMU >> +=============================== >> + >> +To facilitate collection of statistics, Synopsys DesignWare Cores PCIe >> +controller provides the following two features: >> + >> +- Time Based Analysis (RX/TX data throughput and time spent in each >> + low-power LTSSM state) >> +- Lane Event counters (Error and Non-Error for lanes) >> + >> +The PMU is not a PCIe Root Complex integrated End Point (RCiEP) device but >> +only register counters provided by each PCIe Root Port. >> + >> +Time Based Analysis >> +------------------- >> + >> +Using this feature you can obtain information regarding RX/TX data >> +throughput and time spent in each low-power LTSSM state by the controller. >> + >> +The counters are 64-bit width and measure data in two categories, >> + >> +- percentage of time does the controller stay in LTSSM state in a >> + configurable duration. The measurement range of each Event in Group#0. >> +- amount of data processed (Units of 16 bytes). The measurement range of >> + each Event in Group#1. >> + >> +Lane Event counters >> +------------------- >> + >> +Using this feature you can obtain Error and Non-Error information in >> +specific lane by the controller. >> + >> +The counters are 32-bit width and the measured event is select by: >> + >> +- Group i >> +- Event j within the Group i >> +- and Lane k >> + >> +Some of the event counters only exist for specific configurations. >> + >> +DesignWare Cores (DWC) PCIe PMU Driver >> +======================================= >> + >> +This driver add PMU devices for each PCIe Root Port. And the PMU device is >> +named based the BDF of Root Port. For example, >> + >> + 30:03.0 PCI bridge: Device 1ded:8000 (rev 01) >> + >> +the PMU device name for this Root Port is dwc_rootport_3018. > I'd suggest renaming to a scheme lie > dwc_rootport_30:03.0 > to save people remembering how to break up the BDF parts. > >> + >> +Example usage of counting PCIe RX TLP data payload (Units of 16 bytes):: >> + >> + $# perf stat -a -e dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/ >> + >> +average RX bandwidth can be calculated like this: >> + >> + PCIe TX Bandwidth = PCIE_TX_DATA * 16B / Measure_Time_Window > > Could consider an example of the other type of event, the error counters > you mention. Sure, I will add an example to show how to use it. > > Otherwise, looks good to me. > > Jonathan Thank you. Best Regards. Shuai > >> diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst >> index 9de64a40adab..11a80cd28a2e 100644 >> --- a/Documentation/admin-guide/perf/index.rst >> +++ b/Documentation/admin-guide/perf/index.rst >> @@ -19,5 +19,6 @@ Performance monitor support >> arm_dsu_pmu >> thunderx2-pmu >> alibaba_pmu >> + dwc_pcie_pmu >> nvidia-pmu >> meson-ddr-pmu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel