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Sun, 14 Apr 2024 08:55:50 -0700 (PDT) Received: from [10.230.29.214] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id j5-20020a170903024500b001e120a9e964sm6133138plh.126.2024.04.14.08.55.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 14 Apr 2024 08:55:49 -0700 (PDT) Message-ID: <6042c0c7-bb8a-4898-8bed-92155b8e9c4f@broadcom.com> Date: Sun, 14 Apr 2024 08:55:45 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/6] mmc: sdhci-brcmstb: Add BCM2712 SD Express support To: Andrea della Porta , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Broadcom internal kernel review list , Linus Walleij , Adrian Hunter , Kamal Dasu , Al Cooper , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Jonathan Bell , Phil Elwell References: From: Florian Fainelli Autocrypt: addr=florian.fainelli@broadcom.com; keydata= xsBNBFPAG8ABCAC3EO02urEwipgbUNJ1r6oI2Vr/+uE389lSEShN2PmL3MVnzhViSAtrYxeT M0Txqn1tOWoIc4QUl6Ggqf5KP6FoRkCrgMMTnUAINsINYXK+3OLe7HjP10h2jDRX4Ajs4Ghs JrZOBru6rH0YrgAhr6O5gG7NE1jhly+EsOa2MpwOiXO4DE/YKZGuVe6Bh87WqmILs9KvnNrQ PcycQnYKTVpqE95d4M824M5cuRB6D1GrYovCsjA9uxo22kPdOoQRAu5gBBn3AdtALFyQj9DQ KQuc39/i/Kt6XLZ/RsBc6qLs+p+JnEuPJngTSfWvzGjpx0nkwCMi4yBb+xk7Hki4kEslABEB AAHNMEZsb3JpYW4gRmFpbmVsbGkgPGZsb3JpYW4uZmFpbmVsbGlAYnJvYWRjb20uY29tPsLB IQQQAQgAywUCZWl41AUJI+Jo+hcKAAG/SMv+fS3xUQWa0NryPuoRGjsA3SAUAAAAAAAWAAFr ZXktdXNhZ2UtbWFza0BwZ3AuY29tjDAUgAAAAAAgAAdwcmVmZXJyZWQtZW1haWwtZW5jb2Rp bmdAcGdwLmNvbXBncG1pbWUICwkIBwMCAQoFF4AAAAAZGGxkYXA6Ly9rZXlzLmJyb2FkY29t Lm5ldAUbAwAAAAMWAgEFHgEAAAAEFQgJChYhBNXZKpfnkVze1+R8aIExtcQpvGagAAoJEIEx tcQpvGagWPEH/2l0DNr9QkTwJUxOoP9wgHfmVhqc0ZlDsBFv91I3BbhGKI5UATbipKNqG13Z TsBrJHcrnCqnTRS+8n9/myOF0ng2A4YT0EJnayzHugXm+hrkO5O9UEPJ8a+0553VqyoFhHqA zjxj8fUu1px5cbb4R9G4UAySqyeLLeqnYLCKb4+GklGSBGsLMYvLmIDNYlkhMdnnzsSUAS61 WJYW6jjnzMwuKJ0ZHv7xZvSHyhIsFRiYiEs44kiYjbUUMcXor/uLEuTIazGrE3MahuGdjpT2 IOjoMiTsbMc0yfhHp6G/2E769oDXMVxCCbMVpA+LUtVIQEA+8Zr6mX0Yk4nDS7OiBlvOwE0E U8AbwQEIAKxr71oqe+0+MYCc7WafWEcpQHFUwvYLcdBoOnmJPxDwDRpvU5LhqSPvk/yJdh9k 4xUDQu3rm1qIW2I9Puk5n/Jz/lZsqGw8T13DKyu8eMcvaA/irm9lX9El27DPHy/0qsxmxVmU pu9y9S+BmaMb2CM9IuyxMWEl9ruWFS2jAWh/R8CrdnL6+zLk60R7XGzmSJqF09vYNlJ6Bdbs MWDXkYWWP5Ub1ZJGNJQ4qT7g8IN0qXxzLQsmz6tbgLMEHYBGx80bBF8AkdThd6SLhreCN7Uh IR/5NXGqotAZao2xlDpJLuOMQtoH9WVNuuxQQZHVd8if+yp6yRJ5DAmIUt5CCPcAEQEAAcLB gQQYAQIBKwUCU8AbwgUbDAAAAMBdIAQZAQgABgUCU8AbwQAKCRCTYAaomC8PVQ0VCACWk3n+ obFABEp5Rg6Qvspi9kWXcwCcfZV41OIYWhXMoc57ssjCand5noZi8bKg0bxw4qsg+9cNgZ3P N/DFWcNKcAT3Z2/4fTnJqdJS//YcEhlr8uGs+ZWFcqAPbteFCM4dGDRruo69IrHfyyQGx16s CcFlrN8vD066RKevFepb/ml7eYEdN5SRALyEdQMKeCSf3mectdoECEqdF/MWpfWIYQ1hEfdm C2Kztm+h3Nkt9ZQLqc3wsPJZmbD9T0c9Rphfypgw/SfTf2/CHoYVkKqwUIzI59itl5Lze+R5 wDByhWHx2Ud2R7SudmT9XK1e0x7W7a5z11Q6vrzuED5nQvkhAAoJEIExtcQpvGagugcIAJd5 EYe6KM6Y6RvI6TvHp+QgbU5dxvjqSiSvam0Ms3QrLidCtantcGT2Wz/2PlbZqkoJxMQc40rb fXa4xQSvJYj0GWpadrDJUvUu3LEsunDCxdWrmbmwGRKqZraV2oG7YEddmDqOe0Xm/NxeSobc MIlnaE6V0U8f5zNHB7Y46yJjjYT/Ds1TJo3pvwevDWPvv6rdBeV07D9s43frUS6xYd1uFxHC 7dZYWJjZmyUf5evr1W1gCgwLXG0PEi9n3qmz1lelQ8lSocmvxBKtMbX/OKhAfuP/iIwnTsww 95A2SaPiQZA51NywV8OFgsN0ITl2PlZ4Tp9hHERDe6nQCsNI/Us= In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240414_085551_635733_66B6A087 X-CRM114-Status: GOOD ( 33.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============9222146829031168226==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============9222146829031168226== Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000fc488906161089af" --000000000000fc488906161089af Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/13/2024 3:14 PM, Andrea della Porta wrote: > Broadcom BCM2712 SDHCI controller is SD Express capable. Add support > for sde capability where the implementation is based on downstream driver, > diverging from it in the way that init_sd_express callback is invoked: > in downstream the sdhci_ops structure has been augmented with a new > function ptr 'init_sd_express' that just propagate the call to the > driver specific callback so that the callstack from a structure > standpoint is mmc_host_ops -> sdhci_ops. The drawback here is in the > added level of indirection (the newly added init_sd_express is > redundant) and the sdhci_ops structure declaration has to be changed. > To overcome this the presented approach consist in patching the mmc_host_ops > init_sd_express callback to point directly to the custom function defined in > this driver (see struct brcmstb_match_priv). > > Signed-off-by: Andrea della Porta > --- > drivers/mmc/host/Kconfig | 1 + > drivers/mmc/host/sdhci-brcmstb.c | 147 ++++++++++++++++++++++++++++++- > 2 files changed, 147 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig > index aebc587f77a7..343ccac1a4e4 100644 > --- a/drivers/mmc/host/Kconfig > +++ b/drivers/mmc/host/Kconfig > @@ -1018,6 +1018,7 @@ config MMC_SDHCI_BRCMSTB > depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST > depends on MMC_SDHCI_PLTFM > select MMC_CQHCI > + select OF_DYNAMIC > default ARCH_BRCMSTB || BMIPS_GENERIC > help > This selects support for the SDIO/SD/MMC Host Controller on > diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c > index 907a4947abe5..56fb34a75ec2 100644 > --- a/drivers/mmc/host/sdhci-brcmstb.c > +++ b/drivers/mmc/host/sdhci-brcmstb.c > @@ -29,6 +29,7 @@ > > #define BRCMSTB_PRIV_FLAGS_HAS_CQE BIT(0) > #define BRCMSTB_PRIV_FLAGS_GATE_CLOCK BIT(1) > +#define BRCMSTB_PRIV_FLAGS_HAS_SD_EXPRESS BIT(2) > > #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 > > @@ -50,13 +51,19 @@ struct sdhci_brcmstb_priv { > unsigned int flags; > struct clk *base_clk; > u32 base_freq_hz; > + struct regulator *sde_1v8; > + struct device_node *sde_pcie; > + void *__iomem sde_ioaddr; > + void *__iomem sde_ioaddr2; > struct pinctrl *pinctrl; > struct pinctrl_state *pins_default; > + struct pinctrl_state *pins_sdex; > }; > > struct brcmstb_match_priv { > void (*hs400es)(struct mmc_host *mmc, struct mmc_ios *ios); > void (*cfginit)(struct sdhci_host *host); > + int (*init_sd_express)(struct mmc_host *mmc, struct mmc_ios *ios); > struct sdhci_ops *ops; > const unsigned int flags; > }; > @@ -263,6 +270,105 @@ static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host) > } > } > > +static int bcm2712_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios) > +{ > + struct sdhci_host *host = mmc_priv(mmc); > + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > + struct sdhci_brcmstb_priv *brcmstb_priv = sdhci_pltfm_priv(pltfm_host); > + struct device *dev = host->mmc->parent; > + u32 ctrl_val; > + u32 present_state; > + int ret; > + > + if (!brcmstb_priv->sde_ioaddr || !brcmstb_priv->sde_ioaddr2) > + return -EINVAL; > + > + if (!brcmstb_priv->pinctrl) > + return -EINVAL; > + > + /* Turn off the SD clock first */ > + sdhci_set_clock(host, 0); > + > + /* Disable SD DAT0-3 pulls */ > + pinctrl_select_state(brcmstb_priv->pinctrl, brcmstb_priv->pins_sdex); > + > + ctrl_val = readl(brcmstb_priv->sde_ioaddr); > + dev_dbg(dev, "ctrl_val 1 %08x\n", ctrl_val); > + > + /* Tri-state the SD pins */ > + ctrl_val |= 0x1ff8; No magic values please. > + writel(ctrl_val, brcmstb_priv->sde_ioaddr); > + dev_dbg(dev, "ctrl_val 1->%08x (%08x)\n", ctrl_val, readl(brcmstb_priv->sde_ioaddr)); > + /* Let voltages settle */ > + udelay(100); Why not usleep_range()? > + > + /* Enable the PCIe sideband pins */ > + ctrl_val &= ~0x6000; No magic values please. > + writel(ctrl_val, brcmstb_priv->sde_ioaddr); > + dev_dbg(dev, "ctrl_val 1->%08x (%08x)\n", ctrl_val, readl(brcmstb_priv->sde_ioaddr)); > + /* Let voltages settle */ > + udelay(100); Likewise. > + > + /* Turn on the 1v8 VDD2 regulator */ > + ret = regulator_enable(brcmstb_priv->sde_1v8); > + if (ret) > + return ret; > + > + /* Wait for Tpvcrl */ > + msleep(1); > + > + /* Sample DAT2 (CLKREQ#) - if low, card is in PCIe mode */ > + present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); > + present_state = (present_state & SDHCI_DATA_LVL_MASK) >> SDHCI_DATA_LVL_SHIFT; > + dev_dbg(dev, "state = 0x%08x\n", present_state); > + > + if (present_state & BIT(2)) { Likewise, replace with constant. > + dev_err(dev, "DAT2 still high, abandoning SDex switch\n"); > + return -ENODEV; > + } > + > + /* Turn on the LCPLL PTEST mux */ > + ctrl_val = readl(brcmstb_priv->sde_ioaddr2 + 20); // misc5 > + ctrl_val &= ~(0x7 << 7); > + ctrl_val |= 3 << 7; > + writel(ctrl_val, brcmstb_priv->sde_ioaddr2 + 20); > + dev_dbg(dev, "misc 5->%08x (%08x)\n", ctrl_val, readl(brcmstb_priv->sde_ioaddr2 + 20)); > + > + /* PTEST diff driver enable */ > + ctrl_val = readl(brcmstb_priv->sde_ioaddr2); > + ctrl_val |= BIT(21); > + writel(ctrl_val, brcmstb_priv->sde_ioaddr2); > + > + dev_dbg(dev, "misc 0->%08x (%08x)\n", ctrl_val, readl(brcmstb_priv->sde_ioaddr2)); > + > + /* Wait for more than the minimum Tpvpgl time */ > + msleep(100); > + > + if (brcmstb_priv->sde_pcie) { > + struct of_changeset changeset; > + static struct property okay_property = { > + .name = "status", > + .value = "okay", > + .length = 5, > + }; > + > + /* Enable the pcie controller */ > + of_changeset_init(&changeset); > + ret = of_changeset_update_property(&changeset, > + brcmstb_priv->sde_pcie, > + &okay_property); > + if (ret) { > + dev_err(dev, "%s: failed to update property - %d\n", __func__, > + ret); > + return -ENODEV; > + } > + ret = of_changeset_apply(&changeset); > + } Why are you doing this? Cannot the firmware enable/disable the node according to the boot mode or something else? This is not going to fly for upstream, sorry. -- Florian --000000000000fc488906161089af Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIIQeQYJKoZIhvcNAQcCoIIQajCCEGYCAQExDzANBglghkgBZQMEAgEFADALBgkqhkiG9w0BBwGg gg3QMIIFDTCCA/WgAwIBAgIQeEqpED+lv77edQixNJMdADANBgkqhkiG9w0BAQsFADBMMSAwHgYD VQQLExdHbG9iYWxTaWduIFJvb3QgQ0EgLSBSMzETMBEGA1UEChMKR2xvYmFsU2lnbjETMBEGA1UE AxMKR2xvYmFsU2lnbjAeFw0yMDA5MTYwMDAwMDBaFw0yODA5MTYwMDAwMDBaMFsxCzAJBgNVBAYT AkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBS MyBQZXJzb25hbFNpZ24gMiBDQSAyMDIwMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA vbCmXCcsbZ/a0fRIQMBxp4gJnnyeneFYpEtNydrZZ+GeKSMdHiDgXD1UnRSIudKo+moQ6YlCOu4t rVWO/EiXfYnK7zeop26ry1RpKtogB7/O115zultAz64ydQYLe+a1e/czkALg3sgTcOOcFZTXk38e aqsXsipoX1vsNurqPtnC27TWsA7pk4uKXscFjkeUE8JZu9BDKaswZygxBOPBQBwrA5+20Wxlk6k1 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S090 --000000000000fc488906161089af-- --===============9222146829031168226== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============9222146829031168226==--