From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E60FC433F5 for ; Mon, 7 Feb 2022 05:52:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=2HfSuIUOJTVHmTfzJT/DIKlrx53y4VfCdGOa/cNuRCM=; b=gpz04bHweCg2JL9iFkWUSTtCdN 0BxhALioW3Rq/QPYArtLFvUaZ8W3O02ZmB3r2VZiRMGHJbAjvZaEbIfhFvByZPR0jAME3LFkxMLCq 7fxtp7ezDlAiGTqUCV3r3pvn4AEWl1JmaqIl3M7DhWs6H7u1fMtJO7ZVuHAbj8flxHCQFmrXdfGxv xFwOzjOED2Z29m8IDQKSzcJsDrQAOwsK6MWaXmspxSUikEyg6iALxrwyvfLdrnpYfAzRSrz5pC4DB JO0seO+1CInwEDOIdo8uz1GAYLDc5UId5XdfKezl7YyOathzBt8C5Q3a4NqWVgR2jEIKp3H44Z0Cm 2JKWhfTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nGwvv-0094Xe-8y; Mon, 07 Feb 2022 05:51:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nGwvr-0094XJ-T3 for linux-arm-kernel@lists.infradead.org; Mon, 07 Feb 2022 05:51:25 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C40ED6E; Sun, 6 Feb 2022 21:51:22 -0800 (PST) Received: from [10.163.45.31] (unknown [10.163.45.31]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6CEE43F718; Sun, 6 Feb 2022 21:51:19 -0800 (PST) Subject: Re: [PATCH v2 00/15] Make ETM register accesses consistent with sysreg.h To: James Clark , suzuki.poulose@arm.com, mathieu.poirier@linaro.org, coresight@lists.linaro.org Cc: leo.yan@linaro.com, mike.leach@linaro.org, Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220203120604.128396-1-james.clark@arm.com> From: Anshuman Khandual Message-ID: <609d9678-e8c7-163f-86cf-0207c59db2c3@arm.com> Date: Mon, 7 Feb 2022 11:21:18 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20220203120604.128396-1-james.clark@arm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220206_215124_017585_82B64A44 X-CRM114-Status: UNSURE ( 7.23 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi James, On 2/3/22 5:35 PM, James Clark wrote: > James Clark (15): > coresight: Make ETM4x TRCIDR0 register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCIDR2 register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCIDR3 register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCIDR4 register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCIDR5 register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCCONFIGR register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCEVENTCTL1R register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCSTALLCTLR register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCVICTLR register accesses consistent with > sysreg.h > coresight: Make ETM3x ETMTECR1 register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCACATRn register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCSSCCRn and TRCSSCSRn register accesses > consistent with sysreg.h > coresight: Make ETM4x TRCSSPCICRn register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCBBCTLR register accesses consistent with > sysreg.h > coresight: Make ETM4x TRCRSCTLRn register accesses consistent with > sysreg.h The changes here are very similar to each other. But they are split into different patches according to register names just for better review process ? OR is there any other rationale ? - Anshuman _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel