Re: [PATCH v3 2/3] arm64: dts: rockchip: Add hdmi for rk3576

[Detlev Casanova <detlev.casanova@collabora.com>]

Hi Andy,

On Tuesday, 31 December 2024 04:57:19 EST Andy Yan wrote:
> From: Andy Yan <andy.yan@rock-chips.com>
> 
> Add hdmi and it's phy dt node for rk3576.
> 
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
> ---
> 
> (no changes since v1)
> 
>  arch/arm64/boot/dts/rockchip/rk3576.dtsi | 58 ++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 130d11a2cc89..b83f421dc11d
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> @@ -450,6 +450,11 @@ soc {
>  		#size-cells = <2>;
>  		ranges;
> 
> +		hdptxphy_grf: syscon@26032000 {
> +			compatible = "rockchip,rk3576-hdptxphy-grf", 
"syscon";
> +			reg = <0x0 0x26032000 0x0 0x100>;
> +		};
> +
>  		sys_grf: syscon@2600a000 {
>  			compatible = "rockchip,rk3576-sys-grf", "syscon";
>  			reg = <0x0 0x2600a000 0x0 0x2000>;
> @@ -894,6 +899,46 @@ vop_mmu: iommu@27d07e00 {
>  			status = "disabled";
>  		};
> 
> +		hdmi: hdmi@27da0000 {
> +			compatible = "rockchip,rk3576-dw-hdmi-qp";
> +			reg = <0x0 0x27da0000 0x0 0x20000>;
> +			clocks = <&cru PCLK_HDMITX0>,
> +				 <&cru CLK_HDMITX0_EARC>,
> +				 <&cru CLK_HDMITX0_REF>,
> +				 <&cru MCLK_SAI6_8CH>,
> +				 <&cru CLK_HDMITXHDP>,
> +				 <&cru HCLK_VO0_ROOT>;
> +			clock-names = "pclk", "earc", "ref", "aud", "hdp", 
"hclk_vo1";
> +			interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "avp", "cec", "earc", "main", 
"hpd";
> +			phys = <&hdptxphy>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl 
&hdmi_tx_sda>;
> +			power-domains = <&power RK3576_PD_VO0>;
> +			resets = <&cru SRST_HDMITX0_REF>, <&cru 
SRST_HDMITXHDP>;
> +			reset-names = "ref", "hdp";
> +			rockchip,grf = <&ioc_grf>;
> +			rockchip,vo-grf = <&vo0_grf>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				hdmi_in: port@0 {
> +					reg = <0>;
> +				};
> +
> +				hdmi_out: port@1 {
> +					reg = <1>;
> +				};
> +			};
> +		};
> +
>  		qos_hdcp1: qos@27f02000 {
>  			compatible = "rockchip,rk3576-qos", "syscon";
>  			reg = <0x0 0x27f02000 0x0 0x20>;
> @@ -1655,6 +1700,19 @@ uart11: serial@2afd0000 {
>  			status = "disabled";
>  		};
> 
> +		hdptxphy: hdmiphy@2b000000 {
> +			compatible = "rockchip,rk3576-hdptx-phy", 
"rockchip,rk3588-hdptx-phy";
> +			reg = <0x0 0x2b000000 0x0 0x2000>;
> +			clocks = <&cru CLK_PHY_REF_SRC>, <&cru 
PCLK_HDPTX_APB>;
> +			clock-names = "ref", "apb";
> +			resets = <&cru SRST_P_HDPTX_APB>, <&cru 
SRST_HDPTX_INIT>,
> +				 <&cru SRST_HDPTX_CMN>, <&cru 
SRST_HDPTX_LANE>;
> +			reset-names = "apb", "init", "cmn", "lane";
> +			rockchip,grf = <&hdptxphy_grf>;
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		sram: sram@3ff88000 {
>  			compatible = "mmio-sram";
>  			reg = <0x0 0x3ff88000 0x0 0x78000>;

This patch needs rebasing over the USB support patches.

Regards,
Detlev.