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Tue, 1 Oct 2024 17:52:46 +0000 Message-ID: <61470f4b-2cc6-49ea-a94e-35df1642922d@intel.com> Date: Tue, 1 Oct 2024 10:52:44 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next 02/15] net: sparx5: add indirection layer to register macros To: Daniel Machon , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , Steen Hegelund , , , , Richard Cochran , , , , CC: , , References: <20241001-b4-sparx5-lan969x-switch-driver-v1-0-8c6896fdce66@microchip.com> <20241001-b4-sparx5-lan969x-switch-driver-v1-2-8c6896fdce66@microchip.com> Content-Language: en-US From: Jacob Keller In-Reply-To: <20241001-b4-sparx5-lan969x-switch-driver-v1-2-8c6896fdce66@microchip.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SJ0PR13CA0018.namprd13.prod.outlook.com (2603:10b6:a03:2c0::23) To CO1PR11MB5089.namprd11.prod.outlook.com (2603:10b6:303:9b::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PR11MB5089:EE_|MN0PR11MB5961:EE_ X-MS-Office365-Filtering-Correlation-Id: 5994f15a-f2a8-4812-9a31-08dce241db7d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?S1pza3NFVEIyMStORWxWckxmWkRuMWtvYk1pVDlseEo5eHIvd0dZbFZiUkVn?= =?utf-8?B?YWxpVDh6cG1pV25oMFRmSTFLcXlvdEJhbkJSMUI2Wkg5MDlmWUFlWC90dENR?= =?utf-8?B?S3BFTXJkTm9PWTZwS1pmdUljR2lqRGhxYmF2R0d6WitQaG5BUHpSZ3VySVFO?= =?utf-8?B?bDhJRjFyemlPR1lyeUk0Z1VKR3NCVitHK3BrTEVyV1lGQndTNmtONDBadERk?= =?utf-8?B?Slg5cXRMeXo0U1A4czBLTEZ0cUE4VWVDNnp5Z093TkNkNTFXVU9hd1V1K1FX?= =?utf-8?B?OGFRMDEwcXRIck5ZaVVYRnREQnB3SVY0RldmU2pLUzdDOURIbHVVaU1LMlYv?= =?utf-8?B?SjgwZTZHZUNGQ1J0YVh5SnF0ZjNpM2RCRVcyN2lOMU1tOVl3Q2RsdUI4bzRM?= =?utf-8?B?cVZBTXg5MGg1eWtiQW9mM2IwRFdJYUNUUnB5UWs0eFJpK2VQejBHNUpNcm5v?= =?utf-8?B?bjNNSjZ6OGVsbmYxSWh6S2sxRnR3dlBSZWxFRnhCMjFDVWdxUFovNHUxUWFB?= =?utf-8?B?OW5XRExvVWlhTlhSK2dVQVVjcUo5V0FTckdLQ1RjOHVWV3VobEl2anJ2Y2Na?= =?utf-8?B?amdzSVZDYVlIdE14cHZmYUlIY3E5aUNhRENTSnRzNG9zSkk5Rlg0SFNvbTRX?= =?utf-8?B?SnlpcGxnVm1meW54ckVVRGo3N2tzZVhycTVkemY3UDZHUjcrbXhMMmQ2cGxo?= =?utf-8?B?a21DVWJLa3AxQjQzUXBSSlE4VnBLTUVmeFphaGowTnAvQUhpSnBsZXFYY0hq?= =?utf-8?B?MXZ5c0lBZ1RSamIrZTlQU3pTa291ZzB5M04wWWlFTUVrbXExT20ySG9qMnBy?= =?utf-8?B?b1ZBZ1NRcDdHVXRVSmk0clo2OXUzUVBrNG5uOTBabGJCZnhCaHduQjQrTWhj?= =?utf-8?B?aE5OWnVsYWFaS2NmTUpCeWtvd1RDQVNDODgxZVhFT2l4U3Q3a2FnSElwZ2ZS?= =?utf-8?B?NXE4R1UzY2pBYVpVRGpBYVBKMHNBQWNhMGg5TVUwV2ZMaDFQWW41T2hWYUJu?= =?utf-8?B?OXA1MVVUNUwrUnRXV01VZEVBWmJPVmIvS3BRdEwzYXRZLzdKd3VhZlduVHA0?= =?utf-8?B?em56OWdTK2dBa2tGd1djeDVUczVLYUtVby9LWUExbnZyWmF0L2hXekszYzgx?= =?utf-8?B?ZWxkM1Z0cVVtUm85NUh0T3Q5MmJMNEFQODh0aG1UaWRoYkRkWk41aFdrb1dl?= =?utf-8?B?QWkzU2NIRFU4b1JaaVlHUnBuRm9sdWhJUGFDL2NoRXFDaU9nbVBHd0FUUy9Q?= =?utf-8?B?bFdiaGI1L0pMWUt1L2h1d3ZheG9kblFPNENQNjJndHh2bE9tTENxVXU5Ym5a?= =?utf-8?B?UG9uUzJ2TlkwUFlGOVVickd1MXkvdWlhdXppalNxM0l5a2J1b3FYU2tRamM0?= =?utf-8?B?RXZjSlZXcWhHZmRCcHRDVWJPc2kyOUJJODJOaDNoY3hrYWU0aG1lSk15cUlT?= =?utf-8?B?Q0E3cDRkamlaNitZV1djbVRudlNaREFxWThwMVdFNWFaby9RVk5Salhwcm1o?= =?utf-8?B?NDdDM1dqZWhMcU83N2NxdStUTUZQcWsxTEJabXU0NjViWXhoSTFoaXN1dldL?= =?utf-8?B?MzNOVFVKVEUyWjFRRFJZeU5yaU9WekJ3cHh6V1o5ZjhNbm5pVkx1NXFTODJl?= =?utf-8?B?OEdTM0dseUhaSDlBcDdEWjI0NTBwOS9uZGFUc1dBZVd1M2U2VGhIREFsaUJO?= =?utf-8?B?UmgvbkR1Z3MxSkdUelZHVkwvWDY1VUFvTU1yUjEwYjNmZk95ZFpkRXZEQzNr?= =?utf-8?Q?MWoFHqLALNbJoG13OUWYchX0A807cCVNMoUPzDU?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CO1PR11MB5089.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; 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The differences can be one or more of the following: > target size, register address, register count, group address, group > count, group size, field position, field size. > > In order to handle these differences, we introduce a new indirection > layer, that defines and maps them to corresponding values, based on the > platform. As the register macro arguments can now be non-constants, we > also add non-constant variants of FIELD_GET and FIELD_PREP. > > Since the indirection layer contributes to longer macros, we have > changed the formatting of them slightly, to adhere to a 80 character > limit, and added a comment if a macro is platform-specific. > > With these additions, we can reuse all the existing macros for > lan969x. > > Signed-off-by: Daniel Machon > Reviewed-by: Steen Hegelund > --- > drivers/net/ethernet/microchip/sparx5/Makefile | 2 +- > .../net/ethernet/microchip/sparx5/sparx5_main.c | 17 + > .../net/ethernet/microchip/sparx5/sparx5_main.h | 15 + > .../ethernet/microchip/sparx5/sparx5_main_regs.h | 4128 +++++++++++--------- > .../net/ethernet/microchip/sparx5/sparx5_regs.c | 219 ++ > .../net/ethernet/microchip/sparx5/sparx5_regs.h | 244 ++ > 6 files changed, 2755 insertions(+), 1870 deletions(-) > > diff --git a/drivers/net/ethernet/microchip/sparx5/Makefile b/drivers/net/ethernet/microchip/sparx5/Makefile > index 288de95add18..3435ca86dd70 100644 > --- a/drivers/net/ethernet/microchip/sparx5/Makefile > +++ b/drivers/net/ethernet/microchip/sparx5/Makefile > @@ -11,7 +11,7 @@ sparx5-switch-y := sparx5_main.o sparx5_packet.o \ > sparx5_ptp.o sparx5_pgid.o sparx5_tc.o sparx5_qos.o \ > sparx5_vcap_impl.o sparx5_vcap_ag_api.o sparx5_tc_flower.o \ > sparx5_tc_matchall.o sparx5_pool.o sparx5_sdlb.o sparx5_police.o \ > - sparx5_psfp.o sparx5_mirror.o > + sparx5_psfp.o sparx5_mirror.o sparx5_regs.o > > sparx5-switch-$(CONFIG_SPARX5_DCB) += sparx5_dcb.o > sparx5-switch-$(CONFIG_DEBUG_FS) += sparx5_vcap_debugfs.o > diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c > index 179a1dc0d8f6..9a8d2e8c02a5 100644 > --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c > +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c > @@ -29,6 +29,8 @@ > #include "sparx5_port.h" > #include "sparx5_qos.h" > > +const struct sparx5_regs *regs; > + > #define QLIM_WM(fraction) \ > ((SPX5_BUFFER_MEMORY / SPX5_BUFFER_CELL_SZ - 100) * (fraction) / 100) > #define IO_RANGES 3 > @@ -759,6 +761,9 @@ static int mchp_sparx5_probe(struct platform_device *pdev) > sparx5->data = device_get_match_data(sparx5->dev); > if (!sparx5->data) > return -EINVAL; > + > + regs = sparx5->data->regs; > + > /* Do switch core reset if available */ > reset = devm_reset_control_get_optional_shared(&pdev->dev, "switch"); > if (IS_ERR(reset)) > @@ -937,10 +942,22 @@ static void mchp_sparx5_remove(struct platform_device *pdev) > destroy_workqueue(sparx5->mact_queue); > } > > +static const struct sparx5_regs sparx5_regs = { > + .tsize = sparx5_tsize, > + .gaddr = sparx5_gaddr, > + .gcnt = sparx5_gcnt, > + .gsize = sparx5_gsize, > + .raddr = sparx5_raddr, > + .rcnt = sparx5_rcnt, > + .fpos = sparx5_fpos, > + .fsize = sparx5_fsize, > +}; > + > static const struct sparx5_match_data sparx5_desc = { > .iomap = sparx5_main_iomap, > .iomap_size = ARRAY_SIZE(sparx5_main_iomap), > .ioranges = 3, > + .regs = &sparx5_regs, > }; > > static const struct of_device_id mchp_sparx5_match[] = { > diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h > index 845f918aaf5e..e3f22b730d80 100644 > --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h > +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h > @@ -226,6 +226,17 @@ struct sparx5_mall_entry { > #define SPARX5_SKB_CB(skb) \ > ((struct sparx5_skb_cb *)((skb)->cb)) > > +struct sparx5_regs { > + const unsigned int *tsize; > + const unsigned int *gaddr; > + const unsigned int *gcnt; > + const unsigned int *gsize; > + const unsigned int *raddr; > + const unsigned int *rcnt; > + const unsigned int *fpos; > + const unsigned int *fsize; > +}; > + > struct sparx5_main_io_resource { > enum sparx5_target id; > phys_addr_t offset; > @@ -233,6 +244,7 @@ struct sparx5_main_io_resource { > }; > > struct sparx5_match_data { > + const struct sparx5_regs *regs; > const struct sparx5_main_io_resource *iomap; > int ioranges; > int iomap_size; > @@ -308,6 +320,9 @@ struct sparx5 { > const struct sparx5_match_data *data; > }; > > +/* sparx5_main.c */ > +extern const struct sparx5_regs *regs; > + > /* sparx5_switchdev.c */ > int sparx5_register_notifier_blocks(struct sparx5 *sparx5); > void sparx5_unregister_notifier_blocks(struct sparx5 *sparx5); > diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h > index 22acc1f3380c..3783cfd1d855 100644 > --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h > +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h > @@ -1,11 +1,11 @@ > /* SPDX-License-Identifier: GPL-2.0+ > * Microchip Sparx5 Switch driver > * > - * Copyright (c) 2021 Microchip Technology Inc. > + * Copyright (c) 2024 Microchip Technology Inc. > */ > > -/* This file is autogenerated by cml-utils 2023-02-10 11:18:53 +0100. > - * Commit ID: c30fb4bf0281cd4a7133bdab6682f9e43c872ada > +/* This file is autogenerated by cml-utils 2024-09-24 14:13:28 +0200. > + * Commit ID: 9d07b8d19363f3cd3590ddb3f7a2e2768e16524b > */ > > #ifndef _SPARX5_MAIN_REGS_H_ > @@ -15,6 +15,8 @@ > #include > #include > > +#include "sparx5_regs.h" > + > enum sparx5_target { > TARGET_ANA_AC = 1, > TARGET_ANA_ACL = 2, > @@ -52,14 +54,28 @@ enum sparx5_target { > TARGET_VCAP_SUPER = 326, > TARGET_VOP = 327, > TARGET_XQS = 331, > - NUM_TARGETS = 332 > + NUM_TARGETS = 517 > }; > > +/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ > +#define spx5_field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > +#define spx5_field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) > + FIELD_GET and FIELD_SET have restrictions in place to enforce constant mask, which enables strict checks to ensure things fit and determine the bit shifts at compile time without ffs. Would it make sense for these to exist in ? I'm not sure how common it is to have non-const masks.. > +#define GADDR(o) regs->gaddr[o] > +#define GCNT(o) regs->gcnt[o] > +#define GSIZE(o) regs->gsize[o] > +#define RADDR(o) regs->raddr[o] > +#define RCNT(o) regs->rcnt[o] > +#define FPOS(o) regs->fpos[o] > +#define FSIZE(o) regs->fsize[o] > +#define TSIZE(o) regs->tsize[o] This implementation requires 'regs' to be in scope without being passed as a parameter. I guess thats just assumed here?