From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0171BC433E5 for ; Fri, 17 Jul 2020 11:59:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C26AB207F5 for ; Fri, 17 Jul 2020 11:59:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="TvFa0zYH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C26AB207F5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=wgru64a6QlOUaSpd1rOHtPKbXpdLr1tlSt9RDAwm+/s=; b=TvFa0zYHvhXCcOabYoQh3zArq YZvO+StRtKM2km02ruLsQ4IYwCx+9ofdgxcchkDASZw9ExarS5sw8OcAZDOFDUs4vFDM6NJH6KmFt WmGldQcurY9oi4+62VlByHqLTc/4fSCC9oDSJlH5/wF8qCfPnkVdVIJY+nbOInm2YEdU5UwdI30Hs h/jInmk9Oihl4cAf6TP1grDFHZIcIxmJjCeb9N2eq7JlnHC2Sn5v/8Mgd9JmXYmqvxleKdHLbQjxq u6ATyzicJXi+Ur31gMjAqk/IdwkJACr4jnMIWLelAD5FZbP0CtZ1CH9qZBv2tU6+15fliHcA6MlEN 3b34e7/EA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jwP0I-0007e0-La; Fri, 17 Jul 2020 11:58:14 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jwP0G-0007dR-Js for linux-arm-kernel@lists.infradead.org; Fri, 17 Jul 2020 11:58:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 32E7730E; Fri, 17 Jul 2020 04:58:10 -0700 (PDT) Received: from [10.57.35.46] (unknown [10.57.35.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 55CBD3F66E; Fri, 17 Jul 2020 04:58:07 -0700 (PDT) Subject: Re: [PATCH v10 5/5] iommu/arm-smmu: Add global/context fault implementation hooks To: Will Deacon , Krishna Reddy References: <20200708050017.31563-1-vdumpa@nvidia.com> <20200708050017.31563-6-vdumpa@nvidia.com> <20200713134450.GC2739@willie-the-truck> From: Robin Murphy Message-ID: <616235dc-c290-d5c4-47c2-19402213dc11@arm.com> Date: Fri, 17 Jul 2020 12:58:05 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200713134450.GC2739@willie-the-truck> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200717_075812_728261_00430147 X-CRM114-Status: GOOD ( 17.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jonathanh@nvidia.com, devicetree@vger.kernel.org, treding@nvidia.com, bhuntsman@nvidia.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, praithatha@nvidia.com, talho@nvidia.com, snikam@nvidia.com, robh+dt@kernel.org, nicolinc@nvidia.com, linux-tegra@vger.kernel.org, yhsu@nvidia.com, mperttunen@nvidia.com, linux-arm-kernel@lists.infradead.org, bbiswas@nvidia.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-07-13 14:44, Will Deacon wrote: > On Tue, Jul 07, 2020 at 10:00:17PM -0700, Krishna Reddy wrote: >> Add global/context fault hooks to allow vendor specific implementations >> override default fault interrupt handlers. >> >> Update NVIDIA implementation to override the default global/context fault >> interrupt handlers and handle interrupts across the two ARM MMU-500s that >> are programmed identically. >> >> Signed-off-by: Krishna Reddy >> --- >> drivers/iommu/arm-smmu-nvidia.c | 99 +++++++++++++++++++++++++++++++++ >> drivers/iommu/arm-smmu.c | 17 +++++- >> drivers/iommu/arm-smmu.h | 3 + >> 3 files changed, 117 insertions(+), 2 deletions(-) > > Given that faults shouldn't occur during normal operation, is this patch > actually necessary? Indeed they shouldn't, but if something *does* happen to go wrong then I think it's worth having proper handling in place, since the consequences otherwise include a screaming "spurious" fault or just silently losing some transactions and possibly locking up part of the system altogether (depending on HUPCF at least - I recall MMU-500 also behaving funnily WRT TLB maintenance while an IRQ is outstanding, but that was long enough ago that it might have been related to the old CFCFG behaviour). Until we sort out the reserved memory regions thing (the new IORT spec is due Real Soon Now(TM)...) some systems are going to keep suffering transient context faults during boot - those may make the display unhappy until it gets reset, but we certainly don't want to invite the possibility of them wedging the SMMU itself. Robin. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel