[Dev] [PATCH 0/5] RFC: Mezzanine handling for 96boards

[michal.simek@xilinx.com (Michal Simek)]

On 19.6.2018 17:32, Yang Zhang wrote:
> On 19 June 2018 at 16:30, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> 
>> On 19 June 2018 at 17:26, Yang Zhang <yang.zhang@96boards.org> wrote:
>>> Yes.
>>>
>>> https://github.com/96boards/documentation/blob/master/
>> mezzanine/files/mezzanine-design-guidelines.pdf
>>>
>>> Under Configuration data section
>>>
>>
>> OK, fair enough. Do any such mezzanines exist yet? Should we offer
>> more guidance on how exactly this discovery should be implemented?
>>
>>
> I can't be sure, could look into it - I know there were couple of from
> Arrow and ST were supporting this.
> 
> Yes, more details guidance of "How to" is always welcome :-).

Unfortunately this is not saying i2c address and also how to handle
stacked solution.

I have told to Linus what Xilinx is using for FMC connector present on
the most of xilinx development boards.
These on board FMC eeproms contain information in FRU format.
Also there incomplete support fmc support in the kernel in drivers/fmc
which was added by Alessandro Rubini in 2013.

At least these eeprom could reuse FRU data format.

Thanks,
Michal