Re: [PATCH] ARM: dts: rockchip: use non-secure timer as broadcast on rk3288

From: "Heiko Stübner" <heiko@sntech.de>
To: linux-rockchip@lists.infradead.org
Cc: daniel.lezcano@linaro.org, mka@chromium.org,
	dianders@chromium.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: rockchip: use non-secure timer as broadcast on rk3288
Date: Fri, 12 Apr 2019 18:04:28 +0200	[thread overview]
Message-ID: <6218040.Bsc25Bnu9O@diego> (raw)
In-Reply-To: <20190412160012.13066-1-heiko@sntech.de>

Am Freitag, 12. April 2019, 18:00:12 CEST schrieb Heiko Stuebner:
> The rk3288 soc has 2 separate timer blocks one with 6 channels and
> another one with 2 channels that can be set as secure.
> 
> Firmware variants using psci might want to make use of that feature
> making both channels of the secure timer inaccessible for a kernel
> running in non-secure mode, which affects the timer currently used
> as broadcast.
> 
> Therefore move over to using the other (still unused) timer block
> for that. The timer clock in the original node was also wrong,
> as it was pointing to the 6-channel block already, while the clock
> of the 2ch block gets controlled from the secure-grf.
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>

And I just realized, that this is probably dumb, as the timers0-5 are in
cpu powerdomain, while 6+7 are in the alive pd, so probably only the
secure timers are always on, while 0-5 are likely shutdown during
suspend.

> ---
>  arch/arm/boot/dts/rk3288.dtsi | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index a024d1e7e74c..54c408694eac 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -229,14 +229,6 @@
>  		clock-frequency = <24000000>;
>  	};
>  
> -	timer: timer@ff810000 {
> -		compatible = "rockchip,rk3288-timer";
> -		reg = <0x0 0xff810000 0x0 0x20>;
> -		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> -		clocks = <&xin24m>, <&cru PCLK_TIMER>;
> -		clock-names = "timer", "pclk";
> -	};
> -
>  	display-subsystem {
>  		compatible = "rockchip,display-subsystem";
>  		ports = <&vopl_out>, <&vopb_out>;
> @@ -714,6 +706,14 @@
>  		status = "disabled";
>  	};
>  
> +	timer: timer@ff6b0000 {
> +		compatible = "rockchip,rk3288-timer";
> +		reg = <0x0 0xff6b0000 0x0 0x20>;
> +		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&xin24m>, <&cru PCLK_TIMER>;
> +		clock-names = "timer", "pclk";
> +	};
> +
>  	bus_intmem@ff700000 {
>  		compatible = "mmio-sram";
>  		reg = <0x0 0xff700000 0x0 0x18000>;
> 

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