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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jR4tm-0001YW-6j; Wed, 22 Apr 2020 02:14:02 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jR4tj-0001Vw-CF for linux-arm-kernel@lists.infradead.org; Wed, 22 Apr 2020 02:14:01 +0000 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 2520FFF88CC5973942B7; Wed, 22 Apr 2020 10:13:51 +0800 (CST) Received: from [127.0.0.1] (10.173.220.25) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Wed, 22 Apr 2020 10:13:41 +0800 Subject: Re: [PATCH v1 1/6] arm64: Detect the ARMv8.4 TTL feature To: Christoph Hellwig , Peter Zijlstra References: <20200403090048.938-1-yezhenyu2@huawei.com> <20200403090048.938-2-yezhenyu2@huawei.com> <20200421165346.GA11171@infradead.org> <20200421171328.GW20730@hirez.programming.kicks-ass.net> <20200421171641.GA25391@infradead.org> From: Zhenyu Ye Message-ID: <62414595-298a-da11-28eb-36ad1dc59e65@huawei.com> Date: Wed, 22 Apr 2020 10:13:39 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.3.0 MIME-Version: 1.0 In-Reply-To: <20200421171641.GA25391@infradead.org> X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200421_191359_602986_B68CA501 X-CRM114-Status: GOOD ( 10.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, catalin.marinas@arm.com, linux-mm@kvack.org, guohanjun@huawei.com, will@kernel.org, linux-arch@vger.kernel.org, yuzhao@google.com, maz@kernel.org, steven.price@arm.com, arm@kernel.org, Dave.Martin@arm.com, arnd@arndb.de, suzuki.poulose@arm.com, npiggin@gmail.com, zhangshaokun@hisilicon.com, broonie@kernel.org, rostedt@goodmis.org, prime.zeng@hisilicon.com, kuhn.chenqun@huawei.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, xiexiangyou@huawei.com, linux-kernel@vger.kernel.org, aneesh.kumar@linux.ibm.com, akpm@linux-foundation.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020/4/22 1:16, Christoph Hellwig wrote: > On Tue, Apr 21, 2020 at 07:13:28PM +0200, Peter Zijlstra wrote: >> On Tue, Apr 21, 2020 at 09:53:46AM -0700, Christoph Hellwig wrote: >>> On Fri, Apr 03, 2020 at 05:00:43PM +0800, Zhenyu Ye wrote: >>>> From: Marc Zyngier >>>> >>>> In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL >>>> feature allows TLBs to be issued with a level allowing for quicker >>>> invalidation. >>> >>> What does "issued with a level" mean? >> >> What I understood it to be is page-size based on page-table hierarchy. >> Just like we have on x86, 4k, 2m, 1g etc.. >> >> So where x86 INVLPG will tear down any sized page for the address given, >> you can now day, kill me the PMD level translation for @addr. >> >> Power9 radix also has things like this. > > Maybe this needs to be spelled out a little more? The current commit > log sounds like paper generated by a neural network. > Emm... This patch was synchronized from Marc's NV series [1]. "issued with a level" means the TLBs now can get which levels of page tables the @addr is in. You can also understand it as page-size as Peter said above, just like pud, pmd, pte... Anyway, I will explain this in more detail. Thanks, Zhenyu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel