From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C14DCAC592 for ; Fri, 19 Sep 2025 16:11:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zHbJPSMvsOP78z6ga6RIVApIcxEDtPuEjALt245kp7Y=; b=BzvEZs8qBCnyYp6QGnJ93NN48l cQSxzj3lTEXn9V/n+CfJgNIsSmKqvMyB8kKsFXm3XB4wpdepzGf6v3W8PdqKmWSthAPKVLS68xLaW d4GOzJP9jMl60RaNa0EuMW+FzOC78y75A0sSlIKNHw3KjnAu01Cuvu8QvKwROlxnUnhEhR6zkoJDF zyW2I1Pfj88IHcynXRW8ABK+D+2aAWEHLGyN4sx7BJLjQ0RH58TYMQ65NZAZ1tYUx6PUf6pg+UOYw q/R3iMA8NJjUZww0lYFLYeDTbGjKt2YR0lmxeHHIpsW/JTLn9YXQnuk1JxKUOsKTn3HLnBdJNmvth 9nQ6dSGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uzdhY-00000003U5m-22D7; Fri, 19 Sep 2025 16:11:12 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uzdhM-00000003TyU-3Suy for linux-arm-kernel@lists.infradead.org; Fri, 19 Sep 2025 16:11:02 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2527C1C01; Fri, 19 Sep 2025 09:10:52 -0700 (PDT) Received: from [10.1.197.69] (eglon.cambridge.arm.com [10.1.197.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0508C3F66E; Fri, 19 Sep 2025 09:10:54 -0700 (PDT) Message-ID: <63203733-d997-4805-9412-1daa71d786fe@arm.com> Date: Fri, 19 Sep 2025 17:10:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 03/29] ACPI / PPTT: Find cache level by cache-id To: Lorenzo Pieralisi Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich References: <20250910204309.20751-1-james.morse@arm.com> <20250910204309.20751-4-james.morse@arm.com> Content-Language: en-GB From: James Morse In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250919_091100_974404_C3FAB532 X-CRM114-Status: GOOD ( 23.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Lorenzo, On 11/09/2025 16:27, Lorenzo Pieralisi wrote: > On Wed, Sep 10, 2025 at 08:42:43PM +0000, James Morse wrote: >> The MPAM table identifies caches by id. The MPAM driver also wants to know >> the cache level to determine if the platform is of the shape that can be >> managed via resctrl. Cacheinfo has this information, but only for CPUs that >> are online. >> >> Waiting for all CPUs to come online is a problem for platforms where >> CPUs are brought online late by user-space. >> >> Add a helper that walks every possible cache, until it finds the one >> identified by cache-id, then return the level. >> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c >> index 7af7d62597df..c5f2a51d280b 100644 >> --- a/drivers/acpi/pptt.c >> +++ b/drivers/acpi/pptt.c >> @@ -904,3 +904,65 @@ void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus) >> entry->length); >> } >> } >> + >> +/* >> + * find_acpi_cache_level_from_id() - Get the level of the specified cache >> + * @cache_id: The id field of the unified cache >> + * >> + * Determine the level relative to any CPU for the unified cache identified by >> + * cache_id. This allows the property to be found even if the CPUs are offline. >> + * >> + * The returned level can be used to group unified caches that are peers. >> + * >> + * The PPTT table must be rev 3 or later, > > * The PPTT table must be rev 3 or later. Fixed, >> + * >> + * If one CPUs L2 is shared with another as L3, this function will return >> + * an unpredictable value. >> + * >> + * Return: -ENOENT if the PPTT doesn't exist, the revision isn't supported or >> + * the cache cannot be found. >> + * Otherwise returns a value which represents the level of the specified cache. >> + */ >> +int find_acpi_cache_level_from_id(u32 cache_id) >> +{ >> + u32 acpi_cpu_id; >> + int level, cpu, num_levels; >> + struct acpi_pptt_cache *cache; >> + struct acpi_table_header *table; >> + struct acpi_pptt_cache_v1 *cache_v1; >> + struct acpi_pptt_processor *cpu_node; >> + >> + table = acpi_get_pptt(); >> + if (!table) >> + return -ENOENT; >> + >> + if (table->revision < 3) >> + return -ENOENT; >> + >> + for_each_possible_cpu(cpu) { >> + acpi_cpu_id = get_acpi_id_for_cpu(cpu); >> + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); >> + if (!cpu_node) >> + return -ENOENT; > > Same comment as in another patch - don't think you want to stop parsing > here. Yes - this is me throwing my hands up in the air at a nonsense firmware table. 'continue' would be a try harder approach. >> + num_levels = acpi_count_levels(table, cpu_node, NULL); >> + >> + /* Start at 1 for L1 */ >> + for (level = 1; level <= num_levels; level++) { >> + cache = acpi_find_cache_node(table, acpi_cpu_id, >> + ACPI_PPTT_CACHE_TYPE_UNIFIED, >> + level, &cpu_node); >> + if (!cache) >> + continue; >> + >> + cache_v1 = ACPI_ADD_PTR(struct acpi_pptt_cache_v1, >> + cache, >> + sizeof(struct acpi_pptt_cache)); >> + >> + if (cache->flags & ACPI_PPTT_CACHE_ID_VALID && >> + cache_v1->cache_id == cache_id) >> + return level; >> + } >> + } >> + >> + return -ENOENT; >> +} >> diff --git a/include/linux/acpi.h b/include/linux/acpi.h >> index f97a9ff678cc..5bdca5546697 100644 >> --- a/include/linux/acpi.h >> +++ b/include/linux/acpi.h >> @@ -1565,6 +1566,10 @@ static inline int find_acpi_cpu_topology_hetero_id(unsigned int cpu) >> } >> static inline void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, >> cpumask_t *cpus) { } >> +static inline int find_acpi_cache_level_from_id(u32 cache_id) >> +{ >> + return -EINVAL; > return -ENOENT; Yes, same bug as before. Fixed. > Reviewed-by: Lorenzo Pieralisi Thanks - I think the change to ignoring unified caches and searching all types is substantive enough that I won't pick this up because of the changes for v3... Thanks, James