From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52B89606A31A for ; Tue, 27 Oct 2026 06:16:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=2Yaq4SUq; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=gNl64iyI DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Unsubscribe-Post: List-Owner; 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Tue, 27 Oct 2026 06:16:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793081772; bh=uvoFAdGfaZ4vmb8FThF11NeU4sr1Yi3mbqW/0R0Xc/4=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=gNl64iyIyZ4W8GCcXum/V4JdJxjcGeaRNkWl7qKsaRp/BFaacPW33xuthTBsNIuYC NrhSYSSjYD4iOKkYysX4kfSyrQ+AbHDwYohMoK7vccm6mARdHkB9C5XM3pGSUpHSG2 1CJpfcUzrsMbsSYE/53UAbKFFvbAITf3JlYdlo5xeFLH/N8hlVWz0eH/l/JgzvLVta T3/rBMXkprZ4qwOSnFmQzVABINNXqc4NIgitAENXIUbOnH7E3/DtQkzQ0Zu5t3Cf0K 0tNREa0hYCgFMyXZE+oqEpjtP832mky/A7AbpGVTAZE0qtTRvEPUQ0XZWq9h0V+NKI miHlkUNqsHI8g== Message-ID: <66361595-cbda-413f-9559-9fae22001bbd@kernel.org> Date: Tue, 27 Oct 2026 07:16:08 +0100 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/4] serial: 8250_dw: configure the Allwinner H616 UART To: James Hilliard , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev References: <20261024-submit-h616-uart-fifo-v1-v3-0-286fc1b8c3c1@gmail.com> <20261024-submit-h616-uart-fifo-v1-v3-3-286fc1b8c3c1@gmail.com> Content-Language: en-US From: Jiri Slaby Autocrypt: addr=jirislaby@kernel.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-17.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 24. 10. 26, 22:22, James Hilliard wrote: > H616 has 256-byte transmit and receive FIFOs, but its optional DesignWare > component parameter register reads as zero. Generic 16550 probing leaves > the port using the 16-byte FIFO configuration and its trigger-level table. > > Keep PORT_16550A and preserve the FIFO size read from firmware by > uart_read_port_properties(). Use it for the transmit load and derive the > receive thresholds from the documented 1-byte, quarter-full, half-full > and FIFO-depth-minus-two mapping. On H616 these are 1, 64, 128 and 254 > bytes; the normal 16550A half-full FCR setting selects 128 bytes. > > Serialize trigger changes with termios and hold a runtime PM reference > while programming FCR, preserving the FIFO contents. Propagate runtime > resume errors before changing either the FCR shadow or the hardware. > > Advertise automatic flow control so CRTSCTS enables MCR.AFCE. The > DesignWare termios path selects hardware CTS handling, so the capability > must be present for the corresponding hardware control to be enabled. > > Select the fixed configuration through the platform setup callback. > H616 has debug-divisor and RS485 control registers at the offsets used to > detect DesignWare hardware RS485 and fractional-divisor support. Avoid > those probes and retain the BUSY-safe integer divisor hook and software > RS485 handling. > > Use the existing SKIP_SET_RATE quirk to keep the UART clock enabled during > termios changes. Its clock is a gate on the shared APB2 source, rather than > an independent baud-rate generator. > > Signed-off-by: James Hilliard > --- > drivers/tty/serial/8250/8250_dw.c | 75 +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 75 insertions(+) > > diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c > index 9c171c5775a6..557832254c37 100644 > --- a/drivers/tty/serial/8250/8250_dw.c > +++ b/drivers/tty/serial/8250/8250_dw.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -648,6 +649,73 @@ static void dw8250_setup(struct uart_port *p) > dw8250_setup_dma(p); > } > > +static unsigned int dw8250_sunxi_rxtrig_bytes(struct uart_port *p, unsigned int trigger) > +{ > + switch (trigger) { > + case 0: > + return 1; > + case 1: > + return p->fifosize / 4; > + case 2: > + return p->fifosize / 2; > + default: > + return p->fifosize - 2; These constants are counterintuitive. Can you pass the fcr masked, unshifted and do: case UART_FCR_TRIGGER_1: ... case UART_FCR_TRIGGER_4: ... ... instead? > + } > +} > + > +static int dw8250_sunxi_get_rxtrig(struct uart_port *p) > +{ > + struct uart_8250_port *up = up_to_u8250p(p); > + > + guard(uart_port_lock_irqsave)(p); > + > + return dw8250_sunxi_rxtrig_bytes(p, UART_FCR_R_TRIG_BITS(up->fcr)); Here: up->fcr & UART_FCR_TRIGGER_MASK thanks, -- js suse labs