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Tue, 26 Aug 2025 02:20:08 -0700 (PDT) Received: from [192.168.1.3] ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3c711211b19sm15708101f8f.39.2025.08.26.02.20.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Aug 2025 02:20:07 -0700 (PDT) Message-ID: <66cfff9c-e0ec-4171-b62d-80d6139c42f3@linaro.org> Date: Tue, 26 Aug 2025 10:20:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] coresight: tpda: add function to configure TPDA_SYNCR register To: Jie Gan Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Suzuki K Poulose , Mike Leach , Alexander Shishkin , Tingwei Zhang References: <20250826070150.5603-1-jie.gan@oss.qualcomm.com> <20250826070150.5603-3-jie.gan@oss.qualcomm.com> Content-Language: en-US From: James Clark In-Reply-To: <20250826070150.5603-3-jie.gan@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250826_022010_002608_6886AE1B X-CRM114-Status: GOOD ( 21.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 26/08/2025 8:01 am, Jie Gan wrote: > From: Tao Zhang > > The TPDA_SYNCR register defines the frequency at which TPDA generates > ASYNC packets, enabling userspace tools to accurately parse each valid > packet. > > Signed-off-by: Tao Zhang > Co-developed-by: Jie Gan > Signed-off-by: Jie Gan > --- > drivers/hwtracing/coresight/coresight-tpda.c | 15 +++++++++++++++ > drivers/hwtracing/coresight/coresight-tpda.h | 1 + > 2 files changed, 16 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c > index cc254d53b8ec..9e623732d1e7 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.c > +++ b/drivers/hwtracing/coresight/coresight-tpda.c > @@ -189,6 +189,18 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) > writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); > } > > +static void tpda_enable_post_port(struct tpda_drvdata *drvdata) > +{ > + uint32_t val; Minor nit: this is inconsistent with u32 used elsewhere in this file. > + > + val = readl_relaxed(drvdata->base + TPDA_SYNCR); > + /* Clear the mode */ > + val = val & ~TPDA_MODE_CTRL; &= > + /* Program the counter value */ > + val = val | 0xFFF; |= Defining a field would be a bit nicer here. Like: val |= FIELD_PREP(TPDA_SYNCR_COUNTER, UINT32_MAX); Assuming you wanted to set all bits, and 0xFFF isn't some specific value. > + writel_relaxed(val, drvdata->base + TPDA_SYNCR); > +} > + > static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) > { > u32 val; > @@ -227,6 +239,9 @@ static int __tpda_enable(struct tpda_drvdata *drvdata, int port) > tpda_enable_pre_port(drvdata); > > ret = tpda_enable_port(drvdata, port); > + if (!drvdata->csdev->refcnt) > + tpda_enable_post_port(drvdata); Any reason this can't be done on tpda_enable_pre_port()? It has the same logic where it's only done once for the first port. If it can't be done there you should add a comment saying why it must be done after enabling the first port. > + > CS_LOCK(drvdata->base); > > return ret; > diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h > index b651372d4c88..00d146960d81 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.h > +++ b/drivers/hwtracing/coresight/coresight-tpda.h > @@ -9,6 +9,7 @@ > #define TPDA_CR (0x000) > #define TPDA_Pn_CR(n) (0x004 + (n * 4)) > #define TPDA_FPID_CR (0x084) > +#define TPDA_SYNCR (0x08C) > > /* Cross trigger FREQ packets timestamp bit */ > #define TPDA_CR_FREQTS BIT(2)