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(93-34-91-161.ip49.fastwebnet.it. [93.34.91.161]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b5430edsm44822825e9.2.2024.10.25.03.59.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 03:59:58 -0700 (PDT) Message-ID: <671b7a2e.050a0220.4431c.03f5@mx.google.com> X-Google-Original-Message-ID: Date: Fri, 25 Oct 2024 12:59:54 +0200 From: Christian Marangi To: Andrew Lunn Cc: Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiner Kallweit , Russell King , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [net-next RFC PATCH v2 3/3] net: phy: Add Airoha AN8855 Internal Switch Gigabit PHY References: <20241023161958.12056-1-ansuelsmth@gmail.com> <20241023161958.12056-4-ansuelsmth@gmail.com> <87aad5ff-4876-4611-8cf8-5c20df3559b3@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87aad5ff-4876-4611-8cf8-5c20df3559b3@lunn.ch> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241025_040001_916778_DBA85286 X-CRM114-Status: GOOD ( 14.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 23, 2024 at 06:53:14PM +0200, Andrew Lunn wrote: > > + /* Enable Asymmetric Pause Capability */ > > + ret = phy_set_bits(phydev, MII_ADVERTISE, ADVERTISE_PAUSE_ASYM); > > + if (ret) > > + return ret; > > The PHY driver alone does not decide this. The MAC driver needs to > indicate it supports asym pause by calling phy_supports_asym_pause(). > Sorry for the stupid question, I couldn't find this OPs. Any hit how to handle this? > > + > > + /* Disable EEE */ > > + ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); > > + if (ret) > > + return ret; > > Again, the core code should handle this, unless EEE is broken and you > need to force it off. > They confirmed this was done just to handle kernel init condition... Will drop. -- Ansuel