From: "Heiko Stübner" <heiko@sntech.de>
To: Chukun Pan <amadeus@jmu.edu.cn>
Cc: amadeus@jmu.edu.cn, ziyao@disroot.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v7 4/5] arm64: dts: rockchip: add core dtsi for RK3562 SoC
Date: Sun, 11 May 2025 17:32:30 +0200 [thread overview]
Message-ID: <6747980.G0QQBjFxQf@diego> (raw)
In-Reply-To: <20250511150101.51273-1-amadeus@jmu.edu.cn>
Am Sonntag, 11. Mai 2025, 17:01:01 Mitteleuropäische Sommerzeit schrieb Chukun Pan:
> Hi,
>
> > I might be blind, but I don't see a tab missing here? #adress-cells and
> > #size-cells are in the same level of indentation as the other properties
> > of spi0? I did move the -cells down though now.
>
> Sorry I didn't make it clear. This refers to -cells.
>
> > hopefully caught all pwms now
>
> The pinctrl-names of pwm4 to pwm15 are still "active".
>
> > + saradc0: adc@ff730000 {
> > + compatible = "rockchip,rk3562-saradc";
> > + reg = <0x0 0xff730000 0x0 0x100>;
> > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > + #io-channel-cells = <1>;
>
> > > `#io-channel-cells` should be put above `status = "disabled";`
> >
> > moved now :-)
>
> It looks like saradc0 forgot to change.
adapted the rk3562 dtsi again, with those last remants :-)
next prev parent reply other threads:[~2025-05-11 15:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 14:09 [PATCH] arm64: dts: rockchip: Fix PWM pinctrl names Yao Zi
2025-03-12 7:46 ` Heiko Stuebner
2025-05-11 10:00 ` [PATCH v7 4/5] arm64: dts: rockchip: add core dtsi for RK3562 SoC Chukun Pan
2025-05-11 10:14 ` Heiko Stübner
2025-05-11 12:00 ` Chukun Pan
2025-05-11 13:48 ` Heiko Stübner
2025-05-11 15:01 ` Chukun Pan
2025-05-11 15:32 ` Heiko Stübner [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-05-09 10:23 [PATCH v7 0/5] rockchip: Add rk3562 SoC and evb support Kever Yang
2025-05-09 10:23 ` [PATCH v7 4/5] arm64: dts: rockchip: add core dtsi for RK3562 SoC Kever Yang
2025-05-16 7:01 ` Chukun Pan
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