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(93-34-91-161.ip49.fastwebnet.it. [93.34.91.161]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434f8836dbbsm62231295e9.0.2024.12.10.14.32.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 14:32:20 -0800 (PST) Message-ID: <6758c174.050a0220.52a35.06bc@mx.google.com> X-Google-Original-Message-ID: Date: Tue, 10 Dec 2024 23:32:17 +0100 From: Christian Marangi To: Vladimir Oltean Cc: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Srinivas Kandagatla , Heiner Kallweit , Russell King , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@airoha.com Subject: Re: [net-next PATCH v11 5/9] mfd: an8855: Add support for Airoha AN8855 Switch MFD References: <20241209134459.27110-1-ansuelsmth@gmail.com> <20241209134459.27110-1-ansuelsmth@gmail.com> <20241209134459.27110-6-ansuelsmth@gmail.com> <20241209134459.27110-6-ansuelsmth@gmail.com> <20241210211529.osgzd54flq646bcr@skbuf> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241210211529.osgzd54flq646bcr@skbuf> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241210_143224_054497_A02D9D8D X-CRM114-Status: GOOD ( 20.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Dec 10, 2024 at 11:15:29PM +0200, Vladimir Oltean wrote: > On Mon, Dec 09, 2024 at 02:44:22PM +0100, Christian Marangi wrote: > > +int an8855_mii_set_page(struct an8855_mfd_priv *priv, u8 phy_id, > > + u8 page) __must_hold(&priv->bus->mdio_lock) > > +{ > > + struct mii_bus *bus = priv->bus; > > + int ret; > > + > > + ret = __mdiobus_write(bus, phy_id, AN8855_PHY_SELECT_PAGE, page); > > + if (ret < 0) > > + dev_err_ratelimited(&bus->dev, > > + "failed to set an8855 mii page\n"); > > + > > + /* Cache current page if next mii read/write is for switch */ > > + priv->current_page = page; > > + return ret < 0 ? ret : 0; > > +} > > +EXPORT_SYMBOL_GPL(an8855_mii_set_page); > > You could keep the implementation more contained, and you could avoid > exporting an8855_mii_set_page() and an8855_mfd_priv to the MDIO > passthrough driver, if you implement a virtual regmap and give it to the > MDIO passthrough child MFD device. > > If this bus supports only clause 22 accesses (and it looks like it does), > you could expose a 16-bit regmap with a linear address space of 32 MDIO > addresses x 65536 registers. The bus->read() of the MDIO bus passthrough > just performs regmap_read(), and bus->write() just performs regmap_write(). > The MFD driver decodes the regmap address into a PHY address and a regnum, > and performs the page switching locally, if needed. Doesn't regmap add lots of overhead tho? Maybe I should really change the switch regmap to apply a save/restore logic? With an implementation like that current_page is not needed anymore. And I feel additional read/write are ok for switch OP. On mdio I can use the parent-mdio-bus property to get the bus directly without using MFD priv. What do you think? -- Ansuel