From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D5F4C55ABD for ; Thu, 12 Nov 2020 09:23:04 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9B22A21D40 for ; Thu, 12 Nov 2020 09:23:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Uu7oBLgi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9B22A21D40 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/6PYkiznYiNo+QkHy3BFT1m8C8ASjAD3mZuoupS3eAI=; b=Uu7oBLgiypZ72iyp0wL8nd0uf YSqEwn0vjTeKMJqbAt0a/Fe8jAh4JycJJCe/Nvby8k6fZTgR4B+6nLBN8fglURf8G7oUumISLAO4I C8HgaVGZ/wXe3j9qrCr/WEVapZ5X2q2d/3+hEHEgchfQ3XucC/qHprJnHWqYXEe6lxQYKGQpBrjIK Ck8Z6WcAudYoHJl5NKyJnafZuYyTcQp1Wqlay7Q0W38BX4CQYqotD2pa8qAlN3nfAM/80wB5VVBP2 2H/vWnroso0YdNSLfjB45RD80PWpu9+6/VKUvA6/D+bvXRcpFA/G7k+V1yHMqP7wTl/3NrIj3P/mZ 3DAJOBkjQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kd8nj-0002uG-KG; Thu, 12 Nov 2020 09:21:55 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kd8nh-0002th-2Y for linux-arm-kernel@lists.infradead.org; Thu, 12 Nov 2020 09:21:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 75FE0139F; Thu, 12 Nov 2020 01:21:49 -0800 (PST) Received: from [10.57.23.123] (unknown [10.57.23.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ACE453F73C; Thu, 12 Nov 2020 01:21:47 -0800 (PST) Subject: Re: [RFC 02/11] coresight: etm-perf: Allow an event to use different sinks To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org References: <1605012309-24812-1-git-send-email-anshuman.khandual@arm.com> <1605012309-24812-3-git-send-email-anshuman.khandual@arm.com> From: Suzuki K Poulose Message-ID: <67e0864f-e025-aa08-d1b7-36cf19629197@arm.com> Date: Thu, 12 Nov 2020 09:21:40 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.1 MIME-Version: 1.0 In-Reply-To: <1605012309-24812-3-git-send-email-anshuman.khandual@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201112_042153_332613_7867966E X-CRM114-Status: GOOD ( 33.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linu Cherian , Linu Cherian , linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Linu, Please could you test this slightly modified version and give us a Tested-by tag if you are happy with the results ? Suzuki On 11/10/20 12:45 PM, Anshuman Khandual wrote: > From: Suzuki K Poulose > > When there are multiple sinks on the system, in the absence > of a specified sink, it is quite possible that a default sink > for an ETM could be different from that of another ETM. However > we do not support having multiple sinks for an event yet. This > patch allows the event to use the default sinks on the ETMs > where they are scheduled as long as the sinks are of the same > type. > > e.g, if we have 1x1 topology with per-CPU ETRs, the event can > use the per-CPU ETR for the session. However, if the sinks > are of different type, e.g TMC-ETR on one and a custom sink > on another, the event will only trace on the first detected > sink. > > Signed-off-by: Suzuki K Poulose > Signed-off-by: Anshuman Khandual > --- > drivers/hwtracing/coresight/coresight-etm-perf.c | 50 ++++++++++++++++++------ > 1 file changed, 39 insertions(+), 11 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c > index c2c9b12..ea73cfa 100644 > --- a/drivers/hwtracing/coresight/coresight-etm-perf.c > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c > @@ -204,14 +204,22 @@ static void etm_free_aux(void *data) > schedule_work(&event_data->work); > } > > +static bool sinks_match(struct coresight_device *a, struct coresight_device *b) > +{ > + if (!a || !b) > + return false; > + return (sink_ops(a) == sink_ops(b)); > +} > + > static void *etm_setup_aux(struct perf_event *event, void **pages, > int nr_pages, bool overwrite) > { > u32 id; > int cpu = event->cpu; > cpumask_t *mask; > - struct coresight_device *sink; > + struct coresight_device *sink = NULL; > struct etm_event_data *event_data = NULL; > + bool sink_forced = false; > > event_data = alloc_event_data(cpu); > if (!event_data) > @@ -222,6 +230,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, > if (event->attr.config2) { > id = (u32)event->attr.config2; > sink = coresight_get_sink_by_id(id); > + sink_forced = true; > } > > mask = &event_data->mask; > @@ -235,7 +244,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, > */ > for_each_cpu(cpu, mask) { > struct list_head *path; > - struct coresight_device *csdev; > + struct coresight_device *csdev, *new_sink; > > csdev = per_cpu(csdev_src, cpu); > /* > @@ -249,21 +258,35 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, > } > > /* > - * No sink provided - look for a default sink for one of the > - * devices. At present we only support topology where all CPUs > - * use the same sink [N:1], so only need to find one sink. The > - * coresight_build_path later will remove any CPU that does not > - * attach to the sink, or if we have not found a sink. > + * No sink provided - look for a default sink for all the devices. > + * We only support multiple sinks, only if all the default sinks > + * are of the same type, so that the sink buffer can be shared > + * as the event moves around. We don't trace on a CPU if it can't > + * > */ > - if (!sink) > - sink = coresight_find_default_sink(csdev); > + if (!sink_forced) { > + new_sink = coresight_find_default_sink(csdev); > + if (!new_sink) { > + cpumask_clear_cpu(cpu, mask); > + continue; > + } > + /* Skip checks for the first sink */ > + if (!sink) { > + sink = new_sink; > + } else if (!sinks_match(new_sink, sink)) { > + cpumask_clear_cpu(cpu, mask); > + continue; > + } > + } else { > + new_sink = sink; > + } > > /* > * Building a path doesn't enable it, it simply builds a > * list of devices from source to sink that can be > * referenced later when the path is actually needed. > */ > - path = coresight_build_path(csdev, sink); > + path = coresight_build_path(csdev, new_sink); > if (IS_ERR(path)) { > cpumask_clear_cpu(cpu, mask); > continue; > @@ -284,7 +307,12 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, > if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer) > goto err; > > - /* Allocate the sink buffer for this session */ > + /* > + * Allocate the sink buffer for this session. All the sinks > + * where this event can be scheduled are ensured to be of the > + * same type. Thus the same sink configuration is used by the > + * sinks. > + */ > event_data->snk_config = > sink_ops(sink)->alloc_buffer(sink, event, pages, > nr_pages, overwrite); > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel