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Wed, 19 Nov 2025 04:02:54 -0800 (PST) X-Google-Smtp-Source: AGHT+IFNbO4ggiX+mrclow8f9c4D5FHCa9+vVlDZ9B1otcOfIurjoU+/vUjVkaZn/JfwG7EJs2K2WQ== X-Received: by 2002:a05:6a20:734a:b0:35f:aa1b:bc00 with SMTP id adf61e73a8af0-3612f31b05bmr2773313637.59.1763553773847; Wed, 19 Nov 2025 04:02:53 -0800 (PST) Received: from [10.219.57.23] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-bc37517864asm17995503a12.17.2025.11.19.04.02.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Nov 2025 04:02:53 -0800 (PST) Message-ID: <682b1a0c-644f-2aff-1860-cbf9a53bc62b@oss.qualcomm.com> Date: Wed, 19 Nov 2025 17:32:42 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH v17 07/12] firmware: psci: Implement vendor-specific resets as reboot-mode To: Lorenzo Pieralisi Cc: Bartosz Golaszewski , Bjorn Andersson , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Conor Dooley , Andy Yan , Mark Rutland , Arnd Bergmann , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Vinod Koul , Catalin Marinas , Will Deacon , Florian Fainelli , Moritz Fischer , John Stultz , Matthias Brugger , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Stephen Boyd , Andre Draszik , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Xin Liu , Srinivas Kandagatla , Umang Chheda , Nirmesh Kumar Singh References: <20251109-arm-psci-system_reset2-vendor-reboots-v17-0-46e085bca4cc@oss.qualcomm.com> <20251109-arm-psci-system_reset2-vendor-reboots-v17-7-46e085bca4cc@oss.qualcomm.com> <80e68e44-a8e0-464a-056e-9f087ad40d51@oss.qualcomm.com> <1da024e7-efb1-3a1c-cc13-0ae5212ed8bd@oss.qualcomm.com> Content-Language: en-US From: Shivendra Pratap In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE5MDA5NSBTYWx0ZWRfXzY2gDCxxrNow dRtlGk9CW9cttOrvs3cTQipUPTJELRmvKEMb9PjvfHNR3AqN4/Ce2Sph3elCAqn5OnDY4VmvtUX V5JlW+/zregXlQSJolbwMceOmryzJhLz0UJBjgNTsSVdIxBNqdUHmdrrzzdepl/bp/tDR+GykeS 6FxRRFsUdmbggN936kZHla6OdGneWhZ2aCRdXYYQMZHQTF5YzVhozX+n3oqFdk9vwJoX5tGJWNs xTdAdOAbUpbHbVjURA1m1wS2LkGjCSXtrYHUJwWB/bgyUh26ZJxaiCJo03PQFjk0KwesWETfL0H LjnnFpYVgFEbPPA6/oSpy8Tgyrazonyzy4FeoUDC5OkWR4r09KkZHkwI8yV4xBluSrG/sUKyga/ ac0Kd3WvYe3P2t5LZ5iCOCY5lHGKNQ== X-Authority-Analysis: v=2.4 cv=KZTfcAYD c=1 sm=1 tr=0 ts=691db1ef cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=ZSC80-7iYZ4hBk_6gz0A:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: lvdw0SOvM3P4tIc5BXih5Ppu5u2zWDi4 X-Proofpoint-GUID: lvdw0SOvM3P4tIc5BXih5Ppu5u2zWDi4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-19_03,2025-11-18_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1015 suspectscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511190095 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251119_040256_121924_395125C3 X-CRM114-Status: GOOD ( 18.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/19/2025 3:07 PM, Lorenzo Pieralisi wrote: > On Tue, Nov 18, 2025 at 11:11:33PM +0530, Shivendra Pratap wrote: > > [...] > >>> Yes this could be a potential way forward but that's decoupled from the >>> options below. If we take this route PSCI maintainers should be added >>> as maintainers for this reboot mode driver. >> >> you mean the new psci_reset driver? yes. Maintainer would be PSCI maintainer, >> if we create a new psci_reset reboot mode driver. > > Yes. > >>>> - struct with pre-built psci reset_types - (warm, soft, cold). Currently >>>> only two modes supported, anything other than warm/soft defaults to cold. >>>> - vendor resets to be added as per vendor choice, inside psci device tree(SOC specific). >>>> - psci_reset registers with reboot-mode for registering vendor resets. Here, we >>>> have a problem, the pre-built psci reset_types - (warm, soft, cold) cannot be added via >>>> reboot-mode framework. >>> >>> Why ? >> >> If we want the new psci_reset to take the reboot-mode framework route, is it ok to >> add default modes (warm, cold) in the device tree? >> If not, then the design of reboot-mode framework(power:reset:reboot-mode.c) needs to be >> further changed to equip this new feature. > > Well, yes, all it needs to do is allowing prepopulated reboot modes on top > of which DT based ones are added. The mode-cold , adds a third variable to reboot-modes as the first parameter for invoke_psci_fn is different for cold vs warm/vendor. cold reset call : invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); vendor/warm reset call: invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), vendor, cookiee, 0); Each mode will have 3 argument - like: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ MODE , cold reset, reset_type, cookie _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ - COLD , 1 , 0 , 0 WARM , 0 , 0 , 0 vendor1, 0 ,0x80000000 , 1 vendor2, 0 ,0x80000010 , 0 So reboot-mode framework will now define and support upto three 32 bit arguments for each mode? thanks, Shivendra