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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282372868sm19883930b3a.17.2026.06.08.02.42.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Jun 2026 02:42:41 -0700 (PDT) Message-ID: <684fde52-569c-4b38-904c-dbb05054634f@gmail.com> Date: Mon, 8 Jun 2026 17:42:33 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/5] dt-bindings: display: verisilicon,dc: generalize for single-output variants To: Icenowy Zheng , maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260608023237.305036-1-a0987203069@gmail.com> <20260608023237.305036-2-a0987203069@gmail.com> Content-Language: en-US From: Joey Lu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260608_024242_757850_B17287FA X-CRM114-Status: GOOD ( 25.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/8/2026 2:32 PM, Icenowy Zheng wrote: > 在 2026-06-08一的 10:32 +0800，Joey Lu写道： >> The existing schema hard-codes the five-clock/three-reset/dual-port >> topology of the DC8200 IP block, preventing reuse for single-output >> variants such as the Verisilicon DCUltraLite used in the Nuvoton >> MA35D1 >> SoC. >> >> Rework the schema so that variant-specific constraints are expressed >> via >> allOf/if blocks: >> >> - Add nuvoton,ma35d1-dcu to the SoC-specific compatible enum.  The >>   generic verisilicon,dc fallback remains the driver-binding string. >> - Relax the top-level clocks/resets definitions to minItems ranges so >>   the base schema accepts both variants. >> - Keep ports in the global required list and keep >> additionalProperties >>   tightened to unevaluatedProperties. >> - Add an allOf/if block for thead,th1520-dc8200: five-clock (core, >> axi, >>   ahb, pix0, pix1), three-reset (core, axi, ahb). >> - Add an allOf/if block for nuvoton,ma35d1-dcu: two-clock (core, >> pix0), >>   one-reset (core). >> - Fix a stray space in the port@0 description. >> - Add a DT example for the Nuvoton MA35D1 DCU Lite using >> ports/port@0. >> >> Signed-off-by: Joey Lu >> --- >>  .../bindings/display/verisilicon,dc.yaml      | 103 +++++++++++++++- >> -- >>  1 file changed, 90 insertions(+), 13 deletions(-) >> >> diff --git >> a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml >> b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml >> index 9dc35ab973f2..db0260d874c5 100644 >> --- a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml >> +++ b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml >> @@ -17,7 +17,8 @@ properties: >>      items: >>        - enum: >>            - thead,th1520-dc8200 >> -      - const: verisilicon,dc # DC IPs have discoverable ID/revision >> registers >> +          - nuvoton,ma35d1-dcu >> +      - const: verisilicon,dc  # DC IPs have discoverable >> ID/revision registers > Ah is an extra space added here, which leads to this hunk looking > strange? The extra space was added because `yamllint` reports "too few spaces before comment" (warning: comments) when only one space precedes the `#`. However, since this constitutes an unrelated whitespace change that makes the diff harder to read, I will revert to the original single-space form to keep the patch clean. >> >>    reg: >>      maxItems: 1 >> @@ -26,6 +27,7 @@ properties: >>      maxItems: 1 >> >>    clocks: >> +    minItems: 2 > Maybe restrictions about the clock count shouldn't be inserted here, > and technically it's possible that only the pixel clock is controllable > by Linux (all other clocks are in a fixed configuration). Understood. I will remove the per-variant clock items descriptions from the top-level `clocks:` section and move them into the respective allOf/if blocks. The top-level will only carry `minItems`/`maxItems` for schema validation range. >>      items: >>        - description: DC Core clock >>        - description: DMA AXI bus clock >> @@ -34,24 +36,19 @@ properties: >>        - description: Pixel clock of output 1 >> >>    clock-names: >> -    items: >> -      - const: core >> -      - const: axi >> -      - const: ahb >> -      - const: pix0 >> -      - const: pix1 > Ah I think the total list should still appear here, and they should be > corresponding to the descriptions above? Understood. I will restore the full items list for `clock-names` at the top level (all five entries: core, axi, ahb, pix0, pix1) and add `minItems` to make it flexible. Per-variant allOf blocks will only constrain with `minItems`/`maxItems`. >> +    minItems: 2 >> +    maxItems: 5 >> >>    resets: >> +    minItems: 1 >>      items: >>        - description: DC Core reset >>        - description: DMA AXI bus reset >>        - description: Configuration AHB bus reset >> >>    reset-names: >> -    items: >> -      - const: core >> -      - const: axi >> -      - const: ahb > Ditto here. Understood. I will restore the full items list for `reset-names` at the top level (core, axi, ahb) with `minItems`. Same pattern as clock-names. >> +    minItems: 1 >> +    maxItems: 3 >> >>    ports: >>      $ref: /schemas/graph.yaml#/properties/ports >> @@ -59,7 +56,7 @@ properties: >>      properties: >>        port@0: >>          $ref: /schemas/graph.yaml#/properties/port >> -        description: The first output channel , endpoint 0 should be >> +        description: The first output channel, endpoint 0 should be >>            used for DPI format output and endpoint 1 should be used >>            for DP format output. >> >> @@ -77,7 +74,60 @@ required: >>    - clock-names >>    - ports >> >> -additionalProperties: false >> +allOf: >> +  - if: >> +      properties: >> +        compatible: >> +          contains: >> +            const: thead,th1520-dc8200 >> +    then: >> +      properties: >> +        clocks: >> +          minItems: 5 >> +          maxItems: 5 >> + >> +        clock-names: >> +          items: >> +            - const: core >> +            - const: axi >> +            - const: ahb >> +            - const: pix0 >> +            - const: pix1 >> + >> +        resets: >> +          minItems: 3 >> +          maxItems: 3 >> + >> +        reset-names: >> +          items: >> +            - const: core >> +            - const: axi >> +            - const: ahb >> + >> +  - if: >> +      properties: >> +        compatible: >> +          contains: >> +            const: nuvoton,ma35d1-dcu >> +    then: >> +      properties: >> +        clocks: >> +          minItems: 2 >> +          maxItems: 2 >> + >> +        clock-names: >> +          items: >> +            - const: core >> +            - const: pix0 >> + >> +        resets: > Do we have minItems: 1 here? (The DT schema validator always has some > quirks that I fail to remember, so I am not sure.) Yes, I will add `minItems: 1` to `resets:` in the nuvoton block. >> +          maxItems: 1 >> + >> +        reset-names: >> +          items: >> +            - const: core >> + > I think resets should be described as required in both device-specific > bindings. > > Thanks, > Icenowy Understood. I will add `required: [resets, reset-names]` inside the `then:` block for both thead,th1520-dc8200 and nuvoton,ma35d1-dcu. Many thanks! >> +unevaluatedProperties: false >> >>  examples: >>    - | >> @@ -120,3 +170,30 @@ examples: >>          }; >>        }; >>      }; >> + >> +  - | >> +    #include >> +    #include >> +    #include >> + >> +    display@40260000 { >> +        compatible = "nuvoton,ma35d1-dcu", "verisilicon,dc"; >> +        reg = <0x40260000 0x20000>; >> +        interrupts = ; >> +        clocks = <&clk DCU_GATE>, <&clk DCUP_DIV>; >> +        clock-names = "core", "pix0"; >> +        resets = <&sys MA35D1_RESET_DISP>; >> +        reset-names = "core"; >> + >> +        ports { >> +            #address-cells = <1>; >> +            #size-cells = <0>; >> + >> +            port@0 { >> +                reg = <0>; >> +                dpi_out: endpoint { >> +                    remote-endpoint = <&panel_in>; >> +                }; >> +            }; >> +        }; >> +    };