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Mon, 18 Aug 2025 08:08:41 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 X-ThreadId: AXmPW4ZJGxVF Date: Mon, 18 Aug 2025 14:08:20 +0200 From: "Arnd Bergmann" To: "Ulf Hansson" , "yangzh0906@thundersoft.com" Cc: "Krzysztof Kozlowski" , "Rob Herring" , krzk+dt@kernel.org, "Conor Dooley" , "Catalin Marinas" , "Will Deacon" , "Adrian Hunter" , "Robin Murphy" , ding.wang@bst.ai, "gordon.ge" , bst-upstream , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, "linux-mmc @ vger . kernel . org" , soc@lists.linux.dev, linux-kernel@vger.kernel.org Message-Id: <689f58fe-6339-4a3e-9aad-175bff7681f8@app.fastmail.com> In-Reply-To: References: <20250812123110.2090460-1-yangzh0906@thundersoft.com> <20250812123110.2090460-6-yangzh0906@thundersoft.com> Subject: Re: [PATCH v3 5/8] mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver Content-Type: text/plain Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250818_050844_010722_F43C5E54 X-CRM114-Status: GOOD ( 15.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 18, 2025, at 12:48, Ulf Hansson wrote: > On Tue, 12 Aug 2025 at 14:31, Albert Yang wrote: >> + /* >> + * Silicon constraints for BST C1200: >> + * - System RAM base is 0x800000000 (above 32-bit addressable range) >> + * - The eMMC controller DMA engine is limited to 32-bit addressing >> + * - SMMU cannot be used on this path due to hardware design flaws >> + * - These are fixed in silicon and cannot be changed in software >> + * >> + * Bus/controller mapping: >> + * - No registers are available to reprogram the address mapping >> + * - The 32-bit DMA limit is a hard constraint of the controller IP >> + * >> + * Given these constraints, an SRAM-based bounce buffer in the 32-bit >> + * address space is required to enable eMMC DMA on this platform. >> + */ >> + err = bst_sdhci_reallocate_bounce_buffer(host); >> + if (err) { >> + dev_err(&pdev->dev, "Failed to allocate bounce buffer: %d\n", err); >> + goto err_remove_host; >> + } > > FYI, I will be awaiting a confirmation from Arnd to be with the above > hack, before I queue this up. The explanations here are clear enough to me, Acked-by: Arnd Bergmann