Re: [RFC v2 PATCH 0/16] Optimize this_cpu_*() ops for non-x86 (ARM64 for this series)

[Yang Shi <yang@os.amperecomputing.com>]

On 8/4/26 10:23 AM, Lorenzo Stoakes (ARM) wrote:
> On Tue, Aug 04, 2026 at 09:30:08AM -0700, Linus Torvalds wrote:
>> On Tue, 4 Aug 2026 at 09:27, Christoph Lameter (Ampere) <cl@gentwo.org> wrote:
>>> We certainly do not want to replicate that approach. We are using the per
>>> cpu page tables to avoid address calculations in the VM that other
>>> platforms can do with a segment override.
>> Right, and I said that that's ok as long as it's a internal
>> architecture thing. Not a "this is how the VM works".
>>
>> Because people really have wanted to make it a "this is how the VM
>> works" thing. And that is very much what I object to.
> Well :) it fundamentally changes how mm works - now we have a whole new set of
> kernel page tables and PGD's that we have to think about.
>
> And the series either tries to hack changes that fundamentally alter how
> vmalloc works or will add its own duplicative kernel page table code to do the
> same kind of thing.

I don't think this series fundamentally alter how vmalloc works IMHO. 
vmalloc still works in the same way and the page tables share the same 
contents (except local percpu area), it just needs to sync up kernel 
page tables when the top level is changed. This is not new, x86 has been 
doing so for years, see arch_sync_kernel_mappings(). The patch just 
added the implementation for arm64.

>
> So now core mm has to worry about TLB coherency and synchronisation, how this
> might interact with things like page table isolation, and a lot of other
> headaches (and I'm not really convinced they've been thought through here).

I don't think this series changed how TLB is sync'ed either. When we 
invalidate TLB entries for kernel (i.e. vmalloc area), the TLBI is sent 
to all CPUs, it is unchanged.

The series does change how percpu area is setup for ARM64, but this is 
already sort of architecture dependent.

>
> IOW - breaking fundamental assumptions about kernel page tables is inherently a
> whole-VM change (See [0] for instance for an example of what can go wrong).
>
> If Christoph + Yang can provide compelling data that advocates for this change
> AND the core mm and arm64 communities agree to move forward with this, then
> things are different.

We shared some benchmark data in the cover letter. Kernel build is a 
quite common benchmark used by kernel developers. Specjbb and MySQL 
benchmark results are considered important benchmarks as well. I wish I 
could run benchmark on more ARM64 cpus from other vendors, but I do have 
limited access to other hardware.

>
> However, I think the best approach here is to find the least invasive way of
> limiting the change to the architecture itself.
>
> Mark has put forward an approach that eliminates the exact overhead that this
> series aims to address but does so without having to fundamentally alter core
> mm assumptions (v2 posted at [1]).
>
> So that seems very clearly to be a better alternative to me.
>
> Ultimately we need mm and arm64 maintainer agreement on the way forwards (or in
> the case of a truly isolated arm64 solution, arm64 maintainer agreement).
>
> The LSF session was not encouraging ([2]) and as an mm maintainer I'm not at all
> happy with this myself, nor does the arm64 community seem all that enthused so I
> would against gently suggest to Christoph to be a little more open-minded about
> the the proposed alternative which he seems to have dismissed out of hand.

Nobody disagreed Mark's approach also achieved good result, we just 
thought the series can do better. I agree there is always trade off 
between gain and cost, this is why we are seeking more usecases although 
there are different opinions.

Thanks,
Yang

>
>>                Linus
> --
> Cheers, Lorenzo
>
> [0]:https://lore.kernel.org/linux-mm/20260723-series-vmap-race-fix-v6-0-8cc77dcc0018@kernel.org/
> [1]:https://lore.kernel.org/linux-arm-kernel/20260804170503.3513916-1-mark.rutland@arm.com/
> [2]:https://lwn.net/Articles/1073395/