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[92.40.168.124]) by smtp.gmail.com with ESMTPSA id j1-20020adfff81000000b00210bac248c8sm16976883wrr.11.2022.06.21.14.06.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 14:06:18 -0700 (PDT) References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> <20220620200644.1961936-18-aidanmacdonald.0x0@gmail.com> From: Aidan MacDonald To: Andy Shevchenko Cc: Mark Brown , Andy Gross , Bjorn Andersson , Srinivas Kandagatla , Banajit Goswami , Greg Kroah-Hartman , "Rafael J. Wysocki" , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , MyungJoo Ham , Michael Walle , Linus Walleij , Bartosz Golaszewski , Thomas Gleixner , Marc Zyngier , Lee Jones , Manivannan Sadhasivam , Cristian Ciocaltea , Chen-Yu Tsai , tharvey@gateworks.com, rjones@gateworks.com, Matti Vaittinen , orsonzhai@gmail.com, baolin.wang7@gmail.com, zhang.lyra@gmail.com, Jernej Skrabec , Samuel Holland , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , linux-actions@lists.infradead.org, linux-arm-msm , linux-arm Mailing List , linux-sunxi@lists.linux.dev, ALSA Development Mailing List Subject: Re: [PATCH 17/49] regmap-irq: Add broken_mask_unmask flag In-reply-to: Date: Tue, 21 Jun 2022 22:07:24 +0100 Message-ID: <6DVb6JaRd4bhUPBIyfXXiqm668jAPyls@localhost> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220621_140623_028455_68E7D1CE X-CRM114-Status: GOOD ( 17.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Andy Shevchenko writes: > On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald > wrote: >> >> This flag is necessary to prepare for fixing the behavior of unmask >> registers. Existing chips that set mask_base and unmask_base must >> set broken_mask_unmask=1 to declare that they expect the mask bits > > Boolean should take true/false. > >> will be inverted in both registers, contrary to the usual behavior >> of mask registers. > >> diff --git a/include/linux/regmap.h b/include/linux/regmap.h >> index ee2567a0465c..21a70fd99493 100644 >> --- a/include/linux/regmap.h >> +++ b/include/linux/regmap.h >> @@ -1523,6 +1523,7 @@ struct regmap_irq_chip { >> bool clear_on_unmask:1; >> bool not_fixed_stride:1; >> bool status_invert:1; >> + bool broken_mask_unmask:1; > > Looking at the given context, I would group it with clean_on_unmask above. > > The above is weird enough on its own. Can you prepare a precursor > patch that either drops the bit fields of booleans or moves them to > unsigned int? Sure. > Note, bit fields in C are beasts when it goes to concurrent access. It > would be nice to ensure these are not the cases of a such. These are read-only so there's no danger here. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel