From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25029CA1017 for ; Sat, 6 Sep 2025 01:26:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HB2FSA5K3huoF11BiRo8a6gZMsCNJizJgehQIXyoQAA=; b=bLKgXE5HsMVpnHii5bRe+T3+1t AHDZjJUvIx4qWy6f8xDVhHvTEfjVW3gsmr9NYNjyU56sa0/3WP+zy4ZY1o7aSrOdlYjTiBQzsce9J YH6YLJovor8KMkgzGJxQTWBQvm34lW7WT0mh6DEMdtlqDhL+HBTblBgPg04b99NKCMpVItwRdmFcg 9OiSqOAo/lMcxtFv7gg+27zjcnInti/uLIkEM1Xbo8JsEBmrO8YmALfvWJhsgMdTphlhfvJ4RQnwj UJOXbgbcOVqrLJ/Bhp5/yZK72+4sKaQcmVoto86nQCyzRpP/fnBdgjqw28s0JGg/Fce5zqnYzZ5lY FkIQqXhA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uuhgz-00000005s1c-3Ddw; Sat, 06 Sep 2025 01:26:13 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uubUr-00000003uiU-32gM for linux-arm-kernel@lists.infradead.org; Fri, 05 Sep 2025 18:49:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B94FF152B; Fri, 5 Sep 2025 11:49:08 -0700 (PDT) Received: from [10.1.197.69] (unknown [10.1.197.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CA9A23F63F; Fri, 5 Sep 2025 11:49:10 -0700 (PDT) Message-ID: <6a050b35-1b4d-4ea1-aa40-974aafa89b52@arm.com> Date: Fri, 5 Sep 2025 19:49:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 10/33] arm_mpam: Add probe/remove for mpam msc driver and kbuild boiler plate To: Ben Horgan , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, devicetree@vger.kernel.org Cc: shameerali.kolothum.thodi@huawei.com, D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Rex Nie , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich References: <20250822153048.2287-1-james.morse@arm.com> <20250822153048.2287-11-james.morse@arm.com> Content-Language: en-GB From: James Morse In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250905_114917_855263_FD92C65A X-CRM114-Status: GOOD ( 15.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Ben, On 01/09/2025 10:11, Ben Horgan wrote: > On 8/22/25 16:29, James Morse wrote: >> Probing MPAM is convoluted. MSCs that are integrated with a CPU may >> only be accessible from those CPUs, and they may not be online. >> Touching the hardware early is pointless as MPAM can't be used until >> the system-wide common values for num_partid and num_pmg have been >> discovered. >> >> Start with driver probe/remove and mapping the MSC. >> diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h >> new file mode 100644 >> index 000000000000..07e0f240eaca >> --- /dev/null >> +++ b/drivers/resctrl/mpam_internal.h >> @@ -0,0 +1,62 @@ >> +struct mpam_msc { >> + /* member of mpam_all_msc */ >> + struct list_head glbl_list; >> + >> + int id; >> + struct platform_device *pdev; >> + >> + /* Not modified after mpam_is_enabled() becomes true */ >> + enum mpam_msc_iface iface; >> + u32 pcc_subspace_id; >> + struct mbox_client pcc_cl; >> + struct pcc_mbox_chan *pcc_chan; >> + u32 nrdy_usec; >> + cpumask_t accessibility; >> + >> + /* >> + * probe_lock is only take during discovery. After discovery these >> + * properties become read-only and the lists are protected by SRCU. >> + */ >> + struct mutex probe_lock; >> + unsigned long ris_idxs[128 / BITS_PER_LONG]; > Why is this sized this way? RIS_MAX is 4 bits and so there are at most > 16 RIS per msc. Hmmm, lost in time - I agree with the 16 reasoning. Fixed. (It's likely due to RES0 space above the field - but that has been filled in with other stuff since then. RIS was added as a 'backward compatible feature' - I was wary of them extending it) >> + u32 ris_max; >> + >> + /* mpam_msc_ris of this component */ >> + struct list_head ris; >> + >> + /* >> + * part_sel_lock protects access to the MSC hardware registers that are >> + * affected by MPAMCFG_PART_SEL. (including the ID registers that vary >> + * by RIS). >> + * If needed, take msc->lock first. >> + */ >> + struct mutex part_sel_lock; >> + >> + /* >> + * mon_sel_lock protects access to the MSC hardware registers that are >> + * affeted by MPAMCFG_MON_SEL. >> + * If needed, take msc->lock first. >> + */ >> + struct mutex outer_mon_sel_lock; >> + raw_spinlock_t inner_mon_sel_lock; >> + unsigned long inner_mon_sel_flags; >> + >> + void __iomem *mapped_hwpage; >> + size_t mapped_hwpage_sz; >> +}; >> + >> +#endif /* MPAM_INTERNAL_H */ Thanks, James