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[80.183.219.152]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-472c7bec9c2sm12681213f8f.12.2026.06.29.00.27.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jun 2026 00:27:45 -0700 (PDT) Message-ID: <6a421e71.39c9bec7.1462ca.d6ce@mx.google.com> X-Google-Original-Message-ID: Date: Mon, 29 Jun 2026 09:27:42 +0200 From: Christian Marangi To: Philipp Zabel Cc: Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ryder Lee , Michael Turquette , Stephen Boyd , Brian Masney , Matthias Brugger , AngeloGioacchino Del Regno , Jianjun Wang , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 2/4] clk: en7523: add support for dedicated PCIe PERSTOUT reset References: <20260627121450.3529133-1-ansuelsmth@gmail.com> <20260627121450.3529133-3-ansuelsmth@gmail.com> <68b43224e0a124c055fc228b3a254fc7908dbcdd.camel@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <68b43224e0a124c055fc228b3a254fc7908dbcdd.camel@pengutronix.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260629_002748_503048_FBBC66D3 X-CRM114-Status: GOOD ( 25.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 29, 2026 at 09:07:22AM +0200, Philipp Zabel wrote: > On Sa, 2026-06-27 at 14:14 +0200, Christian Marangi wrote: > > Add support for resetting the PCIe lines with the PERSTOUT reset. These > > special reset are controlled by the PCIC register and are specific to each > > of the 3 PCIe lines. > > > > Notice that reset logic is inverted for these bit where 0 is assert and 1 > > deassert. This is intenrally handled in the reset function. > ^^ > typo: internally > Thanks! > > PCI enable/disable are updated to drop PERSTOUT bits in favor dedicated > > reset handling. > > > > Signed-off-by: Christian Marangi > > --- > > drivers/clk/clk-en7523.c | 39 ++++++++++++++++++++++++++++----------- > > 1 file changed, 28 insertions(+), 11 deletions(-) > > > > diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c > > index 1ab0e2eca5d3..c9b21d9bf2f3 100644 > > --- a/drivers/clk/clk-en7523.c > > +++ b/drivers/clk/clk-en7523.c > [...] > > @@ -754,14 +756,21 @@ static int en7523_reset_update(struct reset_controller_dev *rcdev, > > unsigned long id, bool assert) > > { > > struct en_rst_data *rst_data = container_of(rcdev, struct en_rst_data, rcdev); > > - void __iomem *addr = rst_data->base + rst_data->bank_ofs[id / RST_NR_PER_BANK]; > > + u32 offset = rst_data->bank_ofs[id / RST_NR_PER_BANK]; > > + void __iomem *addr = rst_data->base + offset; > > + bool inverted = false; > > u32 val; > > > > + /* For PCIC reset logic is inverted, 0:assert 1:deassert*/ > > + if (offset == REG_NP_SCU_PCIC) > > + inverted = true; > > + > > val = readl(addr); > > + val &= ~BIT(id % RST_NR_PER_BANK); > > if (assert) > > - val |= BIT(id % RST_NR_PER_BANK); > > + val |= inverted ? 0 : BIT(id % RST_NR_PER_BANK); > > else > > - val &= ~BIT(id % RST_NR_PER_BANK); > > + val |= inverted ? BIT(id % RST_NR_PER_BANK) : 0; > > You can simplify this into a single (assert ^ inverted) condition. > Yep I know but I feel this would decrease readability of the logic. Do you think it's worth it? > regards > Philipp -- Ansuel