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(host-79-26-252-140.retail.telecomitalia.it. [79.26.252.140]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-485883959f0sm39338196f8f.10.2026.09.08.07.40.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2026 07:40:48 -0700 (PDT) Message-ID: <6aa01e70.ebbd881c.32bd35.196e@mx.google.com> X-Google-Original-Message-ID: Date: Tue, 8 Sep 2026 16:40:44 +0200 From: Christian Marangi To: Maxime Chevallier , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Simon Horman , Jonathan Corbet , Shuah Khan , Randy Dunlap , Lorenzo Bianconi , Heiner Kallweit , Russell King , Philipp Zabel , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, llvm@lists.linux.dev Subject: Re: [PATCH net-next v15 00/12] net: pcs: Introduce support for fwnode PCS References: <20260901083001.8044-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260901083001.8044-1-ansuelsmth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260908_074051_533622_DDB20AEC X-CRM114-Status: GOOD ( 42.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 01, 2026 at 10:29:15AM +0200, Christian Marangi wrote: > This series introduce a most awaited feature that is correctly > provide PCS with fwnode without having to use specific export symbol > and additional handling of PCS in phylink. > > At times there were 2 different implementation (this and the one > from Sean) but Sean agreed that this can be picked and used in favor > of his implementation as long as his case with race condition is > correctly handled. > > --- > First the PCS fwnode: > > The concept is to implement a producer-consumer API similar to other > subsystem like clock or PHY. > > That seems to be the best solution to the problem as PCS driver needs > to be detached from phylink and implement a simple way to provide a > PCS while maintaining support for probe defer or driver removal. > > To keep the implementation simple, the PCS driver devs needs some > collaboration to correctly implement this. This is O.K. as helper > to correctly implement this are provided hence it's really a matter > of following a pattern to correct follow removal of a PCS driver. > > A PCS provider have to implement and call fwnode_pcs_add_provider() in > probe function and define an xlate function to define how the PCS > should be provided based on the requested interface and phandle spec > defined in fwnode (based on the #pcs-cells) > > fwnode_pcs_get() is provided to provide a specific PCS declared in > fwnode at index. > > A simple xlate function is provided for simple single PCS > implementation, fwnode_pcs_simple_xlate. > > A PCS provider on driver removal must call fwnode_pcs_del_provider() > to delete itself as a provider. > > --- > Second PCS handling in phylink: > > We have the PCS problem for the only reason that in initial > implementation, we permitted way too much flexibility to MAC driver > and things started to deviate. At times we couldn't think SoC > would start to put PCS outside the MAC hence it was OK to assume > they would live in the same driver. With the introduction of > 10g in more consumer devices, we are observing a rapid growth > of this pattern with multiple PCS external to MAC. > > To put a stop on this, the only solution is to give back to phylink > control on PCS handling and enforce more robust supported interface > definition from both MAC and PCS side. > > It's suggested to read patch 0003 of this series for more info, here > a brief explaination of the idea: > > This series introduce handling of PCS in phylink and try to deprecate > .mac_select_pcs. > > Phylink now might contain a linked list of available PCS and > those will be used for PCS selection on phylink_major_config. > > MAC driver needs to define pcs_interfaces mask in phylink_config > for every interface that needs a dedicated PCS. > > These PCS needs to be provided to phylink at phylink_create time > by setting the .fill_available_pcs and .num_possible_pcs in phylink_config. > Helpers to parse PCS from fwnode are provided > fwnode_phylink_pcs_count() that will return the count of PCS entries > described in the firmware node and fwnode_phylink_pcs_parse() that will > fill a preallocated array of PCS pointer with the actual available PCS > (ignoring the one that still needs to be probed). > > phylink_create() will fill the internal PCS list with the passed > array of PCS. phylink_major_config and other user of .mac_select_pcs > are adapted to make use of this new PCS list. > > The supported interface value is also moved internally to phylink > struct. This is to handle late removal and addition of PCS. > (the bonus effect to this is giving phylink a clear idea of what > is actually supported by the MAC and his constraint with PCS) > > The supported interface mask in phylink is done by OR the > supported_interfaces in phylink_config with every PCS in PCS list. > > PCS removal is supported by forcing a mac_config, refresh the > supported interfaces and run a phy_resolve(). > > PCS late addition is supported by introducing a global notifier > for PCS provider. If a phylink have the pcs_interfaces mask not > zero, it's registered to this notifier. > > PCS provider will emit a global PCS add event to signal any > interface that a new PCS might be available. > > The function will then check if the PCS is related to the MAC > fwnode and add it accordingly. > > A user for this new implementation is provided as an Airoha PCS > driver. This was also tested downstream with the IPQ95xx QCOM SoC > and with the help of Daniel also on the various Mediatek MT7988 > SoC with both SFP cage implementation and DSA attached. > > Lots of tests were done with driver unbind/bind and with interface > up/down also by adding print to make sure major_config_fail gets > correctly triggered and reset once the PCS comes back. > > The dedicated commits have longer description on the implementation > so it's suggested to also check there for additional info. > > It's worth to mention that OpenWrt is currently using this on > Mediatek SoC and QCOM ipq807x/ipq60xx/ipq50xx and Airoha are > already ported in staging tree for testing. > Any news of this? I feel this version is now very mature and wonder if an human review is possible or any feedback of any needed change to make any progress? -- Ansuel