From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1315C982DE for ; Mon, 21 Sep 2026 09:31:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8R0L9F6eKBP8mVjs+ITQcSGZyMba9QupshnTXoF8sqU=; b=ylhJY+cghmFkjSzhpjfWnrytrt uPNJ8X2G9unAIYtnhe57mBbL35GeIbOSAg3496XWfnJaIoEUf8vATjPdw64dLMBlwDC/HYjz2iwMC UhDBVAKK+iBCdpTEgoXrN4gVtC92cEj0I7+eOj+vI7go+m7TgsJkichbe+GS4A5vVfmFe4hlsNUDV oyp0Gv7p9FHPRTBOMyJ5ltFpe1gQxq43E8tj9VH+HrkJRz7qvAohKYr6fa+ZuUyq1EApN9GjmD8eT 4o+cSPky4IzE5qlyp+stf0lKwkDMRTnzsWj82qmYcBt9fWtKEfsxRQM2WRTmcC2X1ouRXroV9z1Z8 XoG4ZUOw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8aNG-00000001WcE-0kEk; Mon, 21 Sep 2026 09:31:48 +0000 Received: from out-238.mta1.migadu.com ([2001:41d0:203:375::ee] helo=mta1.migadu.com) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8aMy-00000001WWI-2uBK for linux-arm-kernel@lists.infradead.org; Mon, 21 Sep 2026 09:31:30 +0000 X-Envelope-To: linux-arm-kernel@lists.infradead.org DKIM-Signature: a=rsa-sha256; bh=K1qjGmEUN9aAoDHkdXRdhQEnxRrPQ9nGfz4XoRPKfSM=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1789983085; v=1; x=1790587885; b=OVbVZBXK+CZwqLezNpAhQQMmL2W+0+wcgVgu++3atD+i2QJaVaII/bZifvSkPR+cAfUtLdg2 +j2kNlKJrLUGG8E/LQDQbU2ur9HCv8aoDQ5kK858XZjhe1qOwPOg0MW/6Jd7s9YLWHyzicgy+PV tai1tsVTdLfieIQ1bCZhpJFw= X-Envelope-To: linux-arm-kernel@lists.infradead.org Received: by smtp.migadu.com with ESMTPS id 830b0fab067b0897; Mon, 21 Sep 2026 09:31:25 +0000 X-Mizu-Trace-ID: 830b0fab067b0897 X-Migadu-Flow: FLOW_OUT Message-ID: <6b668efe-ef7a-474a-957c-893755ebba46@linux.dev> Date: Mon, 21 Sep 2026 17:31:17 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] irqchip/gic: Fix UBSAN shift-out-of-bounds in GIC helpers To: Zhu Ling Cc: maz@kernel.org, tglx@kernel.org, radu@rendec.net, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <86ldjlp0qi.wl-maz@kernel.org> <20260921022101.20941-1-zhuling2709@phytium.com.cn> Content-Language: en-US From: Zenghui Yu In-Reply-To: <20260921022101.20941-1-zhuling2709@phytium.com.cn> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260921_023128_890429_E2C8F568 X-CRM114-Status: GOOD ( 19.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/21/26 10:21 AM, Zhu Ling wrote: > When running with UBSAN enabled, enabling a GPIO controller that uses a > GIC interrupt as its parent triggers several shift-out-of-bounds warnings: > > shift-out-of-bounds in drivers/irqchip/irq-gic-common.c:50:21 > left shift of 2 by 30 places cannot be represented in type 'int' > > Similar reports are emitted from gic_poke_irq() and gic_peek_irq() in > drivers/irqchip/irq-gic-v3.c. These masks are generated by shifting > signed integer constants, which invokes undefined behavior when bit 31 > is selected. > > Use BIT() to generate the masks with an unsigned type and make their > intent explicit. > > Signed-off-by: Zhu Ling > --- > Changes in v2: > - Use BIT() instead of explicit unsigned shifts, as suggested by Marc. > - Drop the redundant introductory text from the email. > - Update the author email address. > > Link: https://lore.kernel.org/r/2fJDwUUYdEf2_eaRa041L9xkT8RkSWFeo7euOnqMbbPhUatLlEaAvGfB6sOspDmXaxO87Eh7bQLV9UolyjbMtZBT1wB2UGypjPOo0Z-RC0Q=@proton.me > --- > drivers/irqchip/irq-gic-common.c | 2 +- > drivers/irqchip/irq-gic-v3.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c > index c776f9142610..8bd1eaa54295 100644 > --- a/drivers/irqchip/irq-gic-common.c > +++ b/drivers/irqchip/irq-gic-common.c > @@ -48,7 +48,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, > int gic_configure_irq(unsigned int irq, unsigned int type, > void __iomem *base) > { > - u32 confmask = 0x2 << ((irq % 16) * 2); > + u32 confmask = BIT(((irq % 16) * 2) + 1); > u32 confoff = (irq / 16) * 4; > u32 val, oldval; > int ret = 0; > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index 6e1fa5b247fc..15110d47ddb0 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -457,7 +457,7 @@ static int gic_peek_irq(struct irq_data *d, u32 offset) > u32 index, mask; > > offset = convert_offset_index(d, offset, &index); > - mask = 1 << (index % 32); > + mask = BIT(index % 32); > > if (gic_irq_in_rdist(d)) > base = gic_data_rdist_sgi_base(); > @@ -473,7 +473,7 @@ static void gic_poke_irq(struct irq_data *d, u32 offset) > u32 index, mask; > > offset = convert_offset_index(d, offset, &index); > - mask = 1 << (index % 32); > + mask = BIT(index % 32); > > if (gic_irq_in_rdist(d)) > base = gic_data_rdist_sgi_base(); gic_{poke,peek}_irq in drivers/irqchip/irq-gic.c have a similar pattern. |static void gic_poke_irq(struct irq_data *d, u32 offset) |{ | u32 mask = 1 << (irqd_to_hwirq(d) % 32); Mind fixing them as well? Thanks, Zenghui