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Content-Language: en-US To: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Nicolas Ferre References: <20240816-ludicrous-lagging-65e750c57ab4@thorsis.com> <384919bc-7d45-445a-bc85-630c599d43ef@tuxon.dev> <20240820-grandpa-down-fec4231f971c@thorsis.com> <20240828-gainfully-cringing-2f420d8882bd@thorsis.com> From: claudiu beznea In-Reply-To: <20240828-gainfully-cringing-2f420d8882bd@thorsis.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240831_085003_508781_CDA6DEDE X-CRM114-Status: GOOD ( 19.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Alexander, On 28.08.2024 09:55, Alexander Dahl wrote: > Hello Claudiu, > > Am Fri, Aug 23, 2024 at 05:29:44PM +0300 schrieb claudiu beznea: >> >> >> On 20.08.2024 15:17, Alexander Dahl wrote: >>> By chance: I don't have a sama7g5 based board at hand for testing. >>> The datasheet says the same as for sam9x60. >>> Does the nvmem_microchip_otpc driver actually work without timeout on >>> sama7g5? >> >> Yes! This should be because system bus is clocked from MCK0 (as mentioned >> in peripheral identifiers table) which is enabled by bootloader. > > Not sure I can follow. Citing the SAMA7G5 datasheet section 30.4 > (OTPC Product Dependencies): > > "The OTPC is clocked through the Power Management Controller > (PMC). The user must power on the main RC oscillator and enable > the peripheral clock of the OTPC prior to reading or writing the > OTP memory." I don't see this in [1]. Only: "The OTPC is clocked through the Power Management Controller (PMC), so the programmer must first to configure the PMC." >From this I got that it is about the MCK0 listed in table Table 8-11. Peripheral Identifiers. [1] https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7G5-Series-Data-Sheet-DS60001765A.pdf > > Table from section 8.5 (Peripheral Clocks …) has no check mark at "PMC > clock control" but indeed lists MCK0 as main system bus clock. This is what I was taking about. > If it > works on SAMA7G5 without explicitly enabling main RC oscillator, then > either that clock is on accidentally, or the datasheet is wrong in the > OTPC section. Might be. Thank you, Claudiu Beznea > > Personally I find the "clocked through PMC" part in the OTPC > section suspicious, because in the peripheral identifiers table OTPC > has no "PMC Clock Control" mark. > > Not sure what's the difference between SAM9X60 and SAMA7G5 internally, > though. From a user's POV it's possible one of them requires the > main RC osc, and the other does not, but currently you can't tell from > the datasheets. > >> Here is a snapshot of reading the NVMEM on a SAMA7G5 with bootconfig and >> thermal calibration packets: >> https://www.linux4sam.org/bin/view/Linux4SAM/ThermalFaq > > Greets > Alex >