From: Ben <figure1802@126.com>
To: "Nicolin Chen" <nicolinc@nvidia.com>
Cc: eric.auger@redhat.com,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re:Re: Re: Re: Re: how test the Translation Support for SMMUv3?
Date: Fri, 5 Jan 2024 09:50:09 +0800 (CST) [thread overview]
Message-ID: <6cea5148.f93.18cd7503f65.Coremail.figure1802@126.com> (raw)
In-Reply-To: <ZZcyoK17Wf8pOPNs@Asurada-Nvidia>
At 2024-01-05 06:35:12, "Nicolin Chen" <nicolinc@nvidia.com> wrote:
>On Thu, Jan 04, 2024 at 09:13:39PM +0800, Ben wrote:
>> At 2024-01-04 01:38:11, "Nicolin Chen" <nicolinc@nvidia.com> wrote:
>> >The "Unassigned class" returned by the lspci running in the
>> >host is likely telling you that your kernel doesn't support
>> >the device at all?
>>
>> The device (13b5 ff80) is a special device (SMMUv3TestEngine) implemented in FVP,
>> I wrote a simple PCI driver for it, just probe and call dma_alloc_coherent() API to alloc a DMA buffer.
>>
>> Here is log on Guest side:
>> / # insmod smmu_test.ko
>> [ 8251.668308] smmu_test: module verification failed: signature and/or required key missing - tainting kernel
>> [ 8251.671198] smmu_test 0000:00:02.0: Adding to iommu group 1
>> [ 8251.672748] arm_smmu_attach_dev========
>> [ 8251.673823] arm_smmu_domain_finalise_s1 ====
>> [17991.095955] arm-smmu-v3 arm-smmu-v3.0.auto: arm_smmu_domain_finalise_nested ======
>> [ 8251.675278] smmu_test 0000:00:02.0: enabling device (0000 -> 0002)
>> qemu-system-aarch64-iommufd: IOMMU_IOAS_MAP failed: Bad address
>> qemu-system-aarch64-iommufd: vfio_container_dma_map(0xaaaaf4b56c60, 0x8000000000, 0x40000, 0xffffbc6a4000) = -14 (Bad address)
>> qemu-system-aarch64-iommufd: IOMMU_IOAS_MAP failed: Bad address
>> qemu-system-aarch64-iommufd: vfio_container_dma_map(0xaaaaf4b56c60, 0x800004c000, 0x1000, 0xffffbf49d000) = -14 (Bad address)
>> [ 8251.678163] smmu_test_pci_probe === reg_phy 0x8000000000, len 0x40000
>> [ 8251.679978] smmu_test_pci_probe === reg 0xffff800009300000
>> [ 8251.681908] smmu_test_alloc_dma ---- iova 0xffff800008008000 dma_addr 0xfffff000
>
>Given the dma_addr looks good to me, I think the result is a "pass"?
do you think this dma_addr is GPA or SPA?
I think it looks pass.
>
>> so in this log, some qemu error logs are observed, does it the nested SMMU work fine?
>
>0x8000000000 stuff are the PCI bar memory space that isn't supported
>well yet,
why said this PCI bar memory space isn't supportedit well, hardware issue or software issue? this is physical address of the PCI bar 0, it got from below code:
iommu->reg_phys = pci_resource_start(pdev, 0);
>which shouldn't break a DMA test with 2-stage translation.
>
>> In the Guest side, is it GPA or SPA about the return address (dma_addr) of dma_alloc_coherent() API?
>
>I think so. Try the same test in the host and see if it returns a
>similar print, just ignoring those QEMU logs.
Here is the log for Host side:
[ 0.720409] smmu_test 0000:02:00.0: Adding to iommu group 1
[ 0.720427] smmu_test 0000:02:00.0: enabling device (0000 -> 0002)
[ 0.720433] smmu_test_pci_probe === reg_phy 0x70100000, len 0x40000
[ 0.720439] smmu_test_pci_probe === reg 0xffff800009f80000
[ 0.720447] smmu_test_alloc_dma ---- iova 0xffff800009669000 dma_addr 0xfffff000
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prev parent reply other threads:[~2024-01-05 1:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <61332e87.404e.18caa3d6e15.Coremail.figure1802@126.com>
2023-12-27 21:30 ` how test the Translation Support for SMMUv3? Nicolin Chen
2023-12-31 14:18 ` Ben
2024-01-02 19:51 ` Nicolin Chen
2024-01-03 14:09 ` Ben
2024-01-03 17:38 ` Nicolin Chen
2024-01-04 13:13 ` Ben
2024-01-04 22:35 ` Nicolin Chen
2024-01-05 1:50 ` Ben [this message]
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