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Wed, 27 Jan 2021 09:20:45 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 27 Jan 2021 09:20:44 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 27 Jan 2021 09:20:44 -0600 Received: from [10.250.232.169] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10RFKecd089291; Wed, 27 Jan 2021 09:20:41 -0600 Subject: Re: [PATCH v3 2/2] arm64: dts: ti: k3-j7200: Add support for higher speed modes in MMCSD subsystems To: Nishanth Menon References: <20210127150815.16991-1-a-govindraju@ti.com> <20210127150815.16991-3-a-govindraju@ti.com> <20210127151431.pzqpbtumqzpqiqop@delta> From: Aswath Govindraju Message-ID: <6f9ddf85-e1e9-426a-2436-7f323314959a@ti.com> Date: Wed, 27 Jan 2021 20:50:39 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210127151431.pzqpbtumqzpqiqop@delta> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210127_102047_742732_2DEE1FC6 X-CRM114-Status: GOOD ( 18.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Vignesh Raghavendra , Tero Kristo , Lokesh Vutla , linux-kernel@vger.kernel.org, Faiz Abbas , Rob Herring , Kishon Vijay Abraham I , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Nishanth, On 27/01/21 8:44 pm, Nishanth Menon wrote: > On 20:38-20210127, Aswath Govindraju wrote: >> The following speed modes are now supported in J7200 SoC, >> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1]. >> - UHS-I speed modes in MMCSD1 subsystem [1]. >> >> Add support for UHS-I modes by adding voltage regulator device tree nodes >> and corresponding pinmux details, to power cycle and voltage switch cards. >> Also set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1 >> device tree nodes. >> >> [1] - section 12.3.6.1.1 MMCSD Features, in >> https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf >> >> Signed-off-by: Aswath Govindraju >> --- >> >> performance test logs using EXT4 filesystem for eMMC HS400 speed mode, >> https://pastebin.ubuntu.com/p/KFphDYXj93/ >> > > 5.11.0-rc3-next-20210118-00004 : > > a) could you make sure to post patches when you test with latest next? > b) I see 2 patches in this series, but delta seems to be 4 patches, is > there a dependency I am not aware of? > There are no dependencies. The other two commits are completely unrelated. From next time I will make sure that I use the latest next and the delta matches. Thanks, Aswath _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel