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Fri, 01 May 2026 09:44:38 -0700 (PDT) Received: from [192.168.1.3] ([185.48.77.170]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a8feec2b6sm16014105e9.25.2026.05.01.09.44.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 May 2026 09:44:38 -0700 (PDT) Message-ID: <700f09c7-c9a5-42e2-b9f9-31f9f703890a@linaro.org> Date: Fri, 1 May 2026 17:44:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] coresight: ete: Always save state on power down To: Leo Yan , Suzuki K Poulose Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mike Leach , Alexander Shishkin , Mathieu Poirier References: <20260428-james-cs-ete-pm_save_enable-v1-0-c7a90ca6f43b@linaro.org> <20260428-james-cs-ete-pm_save_enable-v1-1-c7a90ca6f43b@linaro.org> <20260501135053.GA2674113@e132581.arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20260501135053.GA2674113@e132581.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260501_094440_912451_01459C35 X-CRM114-Status: GOOD ( 23.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 01/05/2026 2:50 pm, Leo Yan wrote: > On Fri, May 01, 2026 at 10:43:09AM +0100, James Clark wrote: > > [...] > >>>> +static int etm4_init_pm_save(struct device *dev, struct >>>> etmv4_drvdata *drvdata) >>>> +{ >>>> +    if (etm4x_is_ete(drvdata)) { >>>> +        /* >>>> +         * Always do PM save for ETE. It always uses system registers >>>> +         * which will be lost on CPU power down. >>>> +         */ >>>> +        pm_save_enable = PARAM_PM_SAVE_SELF_HOSTED; >>> >>> Should we do this instead based on if the ETM/ETE is accessed via sys >>> instructions ? That would cover all implementations? >>> >>> >>> Suzuki >>> >> >> I did discuss that with Leo but we thought it might be a riskier change as >> ETM is older and nobody has reported any issues, and there is already the DT >> option to fix it that way. Turning it on by default could cause some >> performance regressions. Although it's only if the ETM is in use, so the >> impact is minimal. >> >> In reality it probably does make sense as it's highly unlikely that sysreg >> ETM wouldn't need saving, so it might make some platforms with misconfigured >> DTs more stable. >> >> I can send another version if you think it makes sense, what do you think >> Leo? > > If extend a bit for ACPI context, it is fine for save / restore based on > sys reg implemenation. This is most nature way for support ACPI? > > We can limit "arm,coresight-loses-context-with-cpu" for only ETM + > MMIO mode. > Does that end up looking something like this? ETE is always !MMIO so we don't need to check for it explicitly: /* * Force PM save for ACPI as it has no way to enable it, and for * sysreg based ETMs (and ETE which is always sysreg) because they are * likely to lose state. */ if (!init_arg->csa->io_mem || is_acpi_device_node(fwnode)) pm_save_enable = PARAM_PM_SAVE_SELF_HOSTED; > BTW, when respin, could you consider the approach for not changing > pm_save_enable. We simply take it as a global parameter, and calculate PM > mode for each CPU. But it is not necessary to write the PM mode back to > pm_save_enable. > > Thanks, > Leo Yep will do.