[RFC] ARM64: 4 level page table translation for 4KB pages

Sungjinn Chung
2014-04-03T09:14:53Z

On Thursday, April 03, 2014 5:38 PM, Catalin Marinas wrote:
> On Thu, Apr 03, 2014 at 03:15:09AM +0100, Sungjinn Chung wrote:
> > On Thursday, April 03, 2014 12:25 AM, Catalin Marinas wrote:
> > > Another reason to decouple the page size is that we have 16K pages
> > > specified in the ARM ARM (and we'll get hardware implementations at some
> > > point). As a simple formula for the max VA space we can cover (capped at
> > > 48-bit):
> > >
> > > VA_BITS = (PAGE_SHIFT - 3) * levels + PAGE_SHIFT
> > >
> > > With 16K pages and 3 levels we can cover 47 bits. So we'll eventually
> > > have the following VA bits options:
> > >
> > > 39 if 4K (3 levels)
> > > 42 if 64K (2 levels)
> > > 47 if 16K (3 levels)
> > > 48 if 4K || 16K || 64K (4/4/3 levels depending on page size)
> >
> > Separation for page size and VA bits looks great to me.
> >
> > I think we can focus on only 4K and 64K at this point.
>
> Yes.
>
> > I'm worried about validation issue for 64K.
>
> Why? The CPUs I'm aware of implement this feature.
Sorry for my mistake. I meant 16K so please just ignore.
>
> > After we secure code for 4K and 64K with refactoring,
> > 16K might not big thing.
>
> Indeed, let's do the refactoring first.
>
> > Jungseok or somebody else can do it. How about your opinion?
>
> If you have time, please go ahead. I could do this as well but probably
> early May.
Ok. Let's talk about it later after we get first patchset from Jungseok.
>
> --
> Catalin