From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Wen Jiang <jiangwenxiaomi@gmail.com>
Cc: akpm@linux-foundation.org, catalin.marinas@arm.com,
linux-mm@kvack.org, urezki@gmail.com, will@kernel.org,
Xueyuan.chen21@gmail.com, ajd@linux.ibm.com, david@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, rppt@kernel.org,
ryan.roberts@arm.com, dev.jain@arm.com,
"Barry Song (Xiaomi)" <baohua@kernel.org>,
Wen Jiang <jiangwen6@xiaomi.com>, Leo Yan <leo.yan@arm.com>
Subject: Re: [PATCH v6 2/6] arm64/vmalloc: Allow arch_vmap_pte_range_map_size to batch multiple CONT_PTE
Date: Wed, 15 Jul 2026 09:01:39 +0530 [thread overview]
Message-ID: <71e8601c-ce7e-4a4e-aa0e-66c9f2a5c9b5@arm.com> (raw)
In-Reply-To: <CAHKocdEOveLGiad3pOFMNGEKec-wvnwY7w88-8k1Npm1t_YTcA@mail.gmail.com>
On 15/07/26 8:19 AM, Wen Jiang wrote:
> On Tue, 14 Jul 2026 at 17:24, Wen Jiang <jiangwenxiaomi@gmail.com> wrote:
>>
>> On Tue, 14 Jul 2026 at 15:13, Anshuman Khandual
>> <anshuman.khandual@arm.com> wrote:
>>>
>>>
>>>
>>> On 09/07/26 1:08 PM, Wen Jiang wrote:
>>>> From: "Barry Song (Xiaomi)" <baohua@kernel.org>
>>>>
>>>> Allow arch_vmap_pte_range_map_size to batch across multiple CONT_PTE
>>>> blocks, reducing both PTE setup and TLB flush iterations.
>>>
>>> Too little commit description for the proposed change here.
>>>>
>>>> Signed-off-by: Barry Song (Xiaomi) <baohua@kernel.org>
>>>> Signed-off-by: Wen Jiang <jiangwen6@xiaomi.com>
>>>> Tested-by: Xueyuan Chen <xueyuan.chen21@gmail.com>
>>>> Tested-by: Leo Yan <leo.yan@arm.com>
>>>> Reviewed-by: Dev Jain <dev.jain@arm.com>
>>>> ---
>>>> arch/arm64/include/asm/vmalloc.h | 6 +++++-
>>>> 1 file changed, 5 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/include/asm/vmalloc.h b/arch/arm64/include/asm/vmalloc.h
>>>> index 4ec1acd3c1b34..7d9c7dc795c42 100644
>>>> --- a/arch/arm64/include/asm/vmalloc.h
>>>> +++ b/arch/arm64/include/asm/vmalloc.h
>>>> @@ -23,6 +23,8 @@ static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr,
>>>> unsigned long end, u64 pfn,
>>>> unsigned int max_page_shift)
>>>> {
>>>> + unsigned long size;
>>>> +
>>>> /*
>>>> * If the block is at least CONT_PTE_SIZE in size, and is naturally
>>>> * aligned in both virtual and physical space, then we can pte-map the
>>>> @@ -40,7 +42,9 @@ static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr,
>>>> if (!IS_ALIGNED(PFN_PHYS(pfn), CONT_PTE_SIZE))
>>>> return PAGE_SIZE;
>>>>
>>>> - return CONT_PTE_SIZE;
>>>> + size = min3(end - addr, 1UL << max_page_shift, PMD_SIZE >> 1);
>>>> + size = rounddown_pow_of_two(size);
>>>> + return size;
>>>
>>> Please do explain the fact in a comment that huge pte mappings
>>> upto PMD_SIZE are being allowed here, if the given block is
>>> CONT_PTE_SIZE aligned.
>>>
>
> Hi Anshuman,
>
> Would the following comment address your concern?
>
> diff --git a/arch/arm64/include/asm/vmalloc.h b/arch/arm64/include/asm/vmalloc.h
> --- a/arch/arm64/include/asm/vmalloc.h
> +++ b/arch/arm64/include/asm/vmalloc.h
> @@ -29,6 +29,8 @@ static inline unsigned long
> arch_vmap_pte_range_map_size(unsigned long addr,
> * If the block is at least CONT_PTE_SIZE in size, and is naturally
> * aligned in both virtual and physical space, then we can pte-map the
> * block using the PTE_CONT bit for more efficient use of the TLB.
> + * The returned mapping size may cover multiple CONT_PTE_SIZE blocks,
> + * capped below PMD_SIZE.
Yes sounds good.
> */
> if (max_page_shift < CONT_PTE_SHIFT)
> return PAGE_SIZE;
>
>>> IIUC arch_vmap_pte_range_map_size() gets used only when config
>>> CONFIG_HUGETLB_PAGE is enabled. Hence should not these new huge
>>> sizes being supported here also be added as valid HugeTLB sizes
>>> thus updating __hugetlb_valid_size() and adding corresponding
>>> new HugeTLB page sizes with hugetlb_add_hstate() ?
>>>
>>> OR could arch_vmap_pte_range_map_size() and set_huge_pte_at()
>>> can be updated for vmalloc without doing corresponding changes
>>> into HugeTLB itself ?
>>
>> These sizes are not new HugeTLB page sizes. They are only vmalloc mapping
>> spans selected for a particular virtually and physically aligned range, so that
>> the PTEs can be installed with the contiguous bit in larger batches.
>>
>> Therefore I do not think they should be added to __hugetlb_valid_size() or
>> registered with hugetlb_add_hstate(). Those describe the HugeTLB hstate sizes,
>> while this change only affects how vmalloc chooses the PTE-level mapping span.
>>
>> Thanks,
>> Wen
>>>> }
>>>>
>>>> #define arch_vmap_pte_range_unmap_size arch_vmap_pte_range_unmap_size
>>>
next prev parent reply other threads:[~2026-07-15 3:32 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 7:38 [PATCH v6 0/6] mm/vmalloc: Speed up ioremap, vmalloc and vmap with contiguous memory Wen Jiang
2026-07-09 7:38 ` [PATCH v6 1/6] arm64/hugetlb: Extend batching of multiple CONT_PTE in a single PTE setup Wen Jiang
2026-07-14 6:54 ` Anshuman Khandual
2026-07-14 8:35 ` Wen Jiang
2026-07-09 7:38 ` [PATCH v6 2/6] arm64/vmalloc: Allow arch_vmap_pte_range_map_size to batch multiple CONT_PTE Wen Jiang
2026-07-14 7:13 ` Anshuman Khandual
2026-07-14 9:24 ` Wen Jiang
2026-07-15 2:49 ` Wen Jiang
2026-07-15 3:31 ` Anshuman Khandual [this message]
2026-07-09 7:38 ` [PATCH v6 3/6] mm/vmalloc: Extract vmap_set_ptes() to consolidate PTE mapping logic Wen Jiang
2026-07-09 7:38 ` [PATCH v6 4/6] mm/vmalloc: Extend page table walk to support larger page_shift sizes and eliminate page table rewalk Wen Jiang
2026-07-13 13:49 ` Dev Jain
2026-07-14 6:10 ` Wen Jiang
2026-07-14 6:45 ` Dev Jain
2026-07-13 14:33 ` Dev Jain
2026-07-09 7:38 ` [PATCH v6 5/6] mm/vmalloc: map contiguous pages in batches for vmap() if possible Wen Jiang
2026-07-13 15:19 ` Dev Jain
2026-07-14 5:16 ` Wen Jiang
2026-07-14 5:33 ` Dev Jain
2026-07-14 4:59 ` Dev Jain
2026-07-09 7:38 ` [PATCH v6 6/6] mm/vmalloc: align vm_area so vmap() can batch mappings Wen Jiang
2026-07-14 5:05 ` Dev Jain
2026-07-09 23:08 ` [PATCH v6 0/6] mm/vmalloc: Speed up ioremap, vmalloc and vmap with contiguous memory Andrew Morton
2026-07-10 8:54 ` Wen Jiang
2026-07-10 8:59 ` Wen Jiang
2026-07-13 15:13 ` Dev Jain
2026-07-13 17:30 ` Uladzislau Rezki
2026-07-14 4:34 ` Dev Jain
2026-07-14 8:36 ` Anshuman Khandual
2026-07-14 11:17 ` Dev Jain
2026-07-15 3:31 ` Wen Jiang
2026-07-15 4:05 ` Anshuman Khandual
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