Re: [PATCH v7 0/2] PCI: Configure Root Port MPS during host probing

[Hans Zhang <18255117159@163.com>]

On 6/23/26 01:14, Bjorn Helgaas wrote:
> On Fri, Jun 19, 2026 at 11:29:39PM +0800, Hans Zhang wrote:
>> On 5/6/26 22:00, Manivannan Sadhasivam wrote:
>>> On Fri, Nov 28, 2025 at 01:09:06AM +0800, Hans Zhang wrote:
>>>> Current PCIe initialization exhibits a key optimization gap: Root Ports
>>>> may operate with non-optimal Maximum Payload Size (MPS) settings. While
>>>> downstream device configuration is handled during bus enumeration, Root
>>>> Port MPS values inherited from firmware or hardware defaults often fail
>>>> to utilize the full capabilities supported by controller hardware. This
>>>> results in suboptimal data transfer efficiency throughout the PCIe
>>>> hierarchy.
>>>>
>>>> This patch series addresses this by:
>>>>
>>>> 1. Core PCI enhancement (Patch 1):
>>>> - Proactively configures Root Port MPS during host controller probing
>>>> - Sets initial MPS to hardware maximum (128 << dev->pcie_mpss)
>>>> - Conditional on PCIe bus tuning being enabled (PCIE_BUS_TUNE_OFF unset)
>>>>     and not in PCIE_BUS_PEER2PEER mode (which requires default 128 bytes)
>>>> - Maintains backward compatibility via PCIE_BUS_TUNE_OFF check
>>>> - Preserves standard MPS negotiation during downstream enumeration
>>>>
>>>> 2. Driver cleanup (Patch 2):
>>>> - Removes redundant MPS configuration from Meson PCIe controller driver
>>>> - Functionality is now centralized in PCI core
>>>> - Simplifies driver maintenance long-term
>>>>
>>>
>>> For the series,
>>>
>>> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
>>>
>>> Bjorn: Could you please take a look? This series has been floating for a
>>> while...
>>
>> Hello Bjorn,
>>
>> Any chance for this series to be applied?
> 
> It's too late for v7.2; we're already more than halfway through the
> merge window.  We can look again for v7.3 after v7.2-rc1.

Hello Bjorn,

Gentle ping on this series.

Best regards,
Hans