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Tue, 09 Jun 2020 12:48:41 +0100 MIME-Version: 1.0 Date: Tue, 09 Jun 2020 12:48:41 +0100 From: Marc Zyngier To: Robin Murphy Subject: Re: [PATCH 1/2] KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts In-Reply-To: <7c173265-3f8e-51df-d700-7e3658a0e4d8@arm.com> References: <20200609084921.1448445-1-maz@kernel.org> <20200609084921.1448445-2-maz@kernel.org> <7c173265-3f8e-51df-d700-7e3658a0e4d8@arm.com> User-Agent: Roundcube Webmail/1.4.4 Message-ID: <7451e64c22d8432f998458e0343aee7f@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: robin.murphy@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, james.morse@arm.com, stable@vger.kernel.org, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200609_044845_823092_B1A497E6 X-CRM114-Status: GOOD ( 11.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvm@vger.kernel.org, Suzuki K Poulose , stable@vger.kernel.org, James Morse , Julien Thierry , kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Robin, On 2020-06-09 12:41, Robin Murphy wrote: > On 2020-06-09 09:49, Marc Zyngier wrote: >> AArch32 CP1x registers are overlayed on their AArch64 counterparts >> in the vcpu struct. This leads to an interesting problem as they >> are stored in their CPU-local format, and thus a CP1x register >> doesn't "hit" the lower 32bit portion of the AArch64 register on >> a BE host. >> >> To workaround this unfortunate situation, introduce a bias trick >> in the vcpu_cp1x() accessors which picks the correct half of the >> 64bit register. >> >> Cc: stable@vger.kernel.org >> Reported-by: James Morse >> Signed-off-by: Marc Zyngier >> --- >> arch/arm64/include/asm/kvm_host.h | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/include/asm/kvm_host.h >> b/arch/arm64/include/asm/kvm_host.h >> index 59029e90b557..e80c0e06f235 100644 >> --- a/arch/arm64/include/asm/kvm_host.h >> +++ b/arch/arm64/include/asm/kvm_host.h >> @@ -404,8 +404,14 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, >> u64 val, int reg); >> * CP14 and CP15 live in the same array, as they are backed by the >> * same system registers. >> */ >> -#define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)]) >> -#define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)]) >> +#ifdef CPU_BIG_ENDIAN > > Ahem... I think you're missing a "CONFIG_" there ;) Duh! As I said, I didn't test the thing at all! ;-) > Bonus trickery - for a 0 or 1 value you can simply use IS_ENABLED(). Beautiful! Definitely a must! :D Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel