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([2001:861:44c0:66c0:d1:e096:d183:1bc5]) by smtp.gmail.com with ESMTPSA id n8-20020a5d5888000000b002079f95ca87sm5593940wrf.68.2022.04.11.00.30.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Apr 2022 00:30:37 -0700 (PDT) Message-ID: <7458df77-2721-71a5-893f-8247f05be765@baylibre.com> Date: Mon, 11 Apr 2022 09:30:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 0/2] Ensure High and Low periods of SCL are correct Content-Language: en-US To: Lucas Tanure , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220409164334.157664-1-tanure@linux.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: <20220409164334.157664-1-tanure@linux.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220411_003040_812088_0E85A62E X-CRM114-Status: GOOD ( 16.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On 09/04/2022 18:43, Lucas Tanure wrote: > The default duty cycle of 33% is less than the required > by the I2C specs for the LOW period of the SCL clock at > 100KHz bus speed. > > So, for 100Khz or less, use 50%H/50%L duty cycle, and > for the clock above 100Khz, use 40%H/60%L duty cycle. > That ensures the low period of SCL is always more than > the minimum required by the specs at any given frequency. > > I did a few measures on the Khadas Vim3 board: > > i2c_AO (i2c@5000): > > Before the patchset, I got: > - 100KHz: 3.338us HIGH, 6.746us LOW, 33%/67%, Freq 99KHz (Not Valid tHIGH < 4.0us) > - 400KHz: 860ns HIGH, 1.734us LOW, 33.15%/62.85%, Freq 385.505KHz (Valid) > - 1000KHz: 362ns HIGH, 732ns LOW, 33.09%/66.91%, Freq 914.077KHz (Valid) > > With the patchset > - 100KHz: 4.952us HIGH, 5.134us LOW, 49%/51%, Freq 99KHz (Valid) > - 400KHz: 966ns HIGH, 1.628us LOW, 37.24%/62.76%, Freq 385.505KHz (Valid) > - 1000KHz: 372ns HIGH, 720ns LOW, 34.07%/65.93%, Freq 915.741KHz (Valid) > > i2c3 (i2c@1c000): > > Before the patchset, I got: > - 100KHz: 3.348us HIGH, 6.704us LOW, 33%/67%, Freq 99.5KHz (Not Valid tHIGH < 4.0us) > - 400KHz: 864ns HIGH, 1.69us LOW, 33.83%/62.17%, Freq 391.543KHz (Valid) > - 1000KHz: 360ns HIGH, 690ns LOW, 34.29%/65.71%, Freq 952.381KHz (Valid) > > With the patchset > - 100KHz: 4.958us HIGH, 5.092us LOW, 49%/51%, Freq 99KHz (Valid) > - 400KHz: 970ns HIGH, 1.582us LOW, 38%/62%, Freq 391.85KHz (Valid) > - 1000KHz: 370ns HIGH, 680ns LOW, 35.24%/64.76%, Freq 952.57KHz (Valid) > > v2 changelog: > - Keep the previous calculation for Meson6 > - Use I2C_MAX_STANDARD_MODE_FREQ > - move the comment before the if() > - use FIELD_PREP for setting div_l > - Drop removal of meson_i2c_data > > Previous versions: > V1: https://lkml.org/lkml/2022/3/26/109 > > Lucas Tanure (2): > i2c: meson: Use _SHIFT and _MASK for register definitions > i2c: meson: Use 50% duty cycle for I2C clock > > drivers/i2c/busses/i2c-meson.c | 111 ++++++++++++++++++++++++--------- > 1 file changed, 82 insertions(+), 29 deletions(-) > Thanks a lot for the timings ! I think it's ok to be applied, Neil _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel